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PCB Layout Allegro FPGA Verilog VHDL Python Lua C C++ USB 3.2 USB-PD Display Port PCIe I2C SPI DFT Data Analysis +12 more Show less

C C++ Objective-C Digital Signal Processing DSP Control Systems Test Automation Circuit Analysis Electromechanical Systems Root Cause Analysis NPI Modeling Simulations Algorithms +9 more Show less

Verilog SystemVerilog RTL Design SoC PCIe HBM AMBA AXI DMA Synthesis Timing Constraints CDC Lint RDC DFT Python Perl Agile Post-Silicon Debug +13 more Show less

Software Systems Architecture Python XML Perl Interface Design Traceability Verification Validation User Interface Design Project Management +5 more Show less

FPGA Circuit Analysis Hardware Design Troubleshooting AI

Digital Design Mixed Signal FPGA Silicon Bring-up Characterization Debug MIPI SoundWire I2S SPMI Audio Amplifier Codec Power Converters Micro-architecture Emulation Verification Validation +12 more Show less

Digital Design Mixed Signal Design FPGA Silicon Bring-up Characterization Debug MIPI SoundWire I2S SPMI Audio Amplifier Codec Power Converters Micro-architecture Emulation Verification +11 more Show less

MBSE Cameo MagicDraw DOORS SysML DoDAF Digital Engineering Requirements Management Systems Engineering Cloud Systems Virtual Machines Modeling and Simulation CAM SPI CPI Microsoft Office +11 more Show less

PCB Design PCB Layout System Validation Oscilloscopes Multimeters Logic Analyzers Linux Windows Tegra SoC GPU Bringup +6 more Show less

PCB Design Oscilloscopes Multimeters Logic Analyzers Linux Windows GPU Tegra System Design +4 more Show less

Ethernet SerDes Python Broadcom SDK Redfish API IPMI BMC OpenBMC FEC PAM4 LinkCAT Signal Integrity PRBS Test Automation Hardware Bring-up Firmware PCB Layout Oscilloscope Protocol Analyzer +14 more Show less

React TypeScript Figma Design Systems Style Dictionary Storybook CI/CD CSS Custom Properties pnpm Turborepo Changesets SemVer React Aria DTCG Design Tokens Monorepos Visual Regression Testing +11 more Show less

ASIC Design RTL Coding Digital Design HBM LPDDR DDR NoC SRAM Cache Controller x86 ARM Gate Level Simulation Synthesis Timing Closure Power Analysis Hardware Architecture +11 more Show less

Physical Design Synthesis PnR STA CTS Floorplanning Routing UPF Python Tcl Innovus ICC2 Fusion Compiler Genus PrimeTime Tempus LEC VLSI +13 more Show less

React TypeScript Figma Design Systems Style Dictionary Storybook CI/CD Accessibility ARIA CSS Custom Properties pnpm Turborepo Changesets SemVer Radix React Aria DTCG Monorepos Linting +14 more Show less

React TypeScript Python Node.js HTML CSS Storybook GitHub Claude Code MCP CI/CD WCAG 2.2 AA Axe Figma OutSystems data-visualization SDLC +12 more Show less

Siemens NX Teamcenter PLM CAD GD&T BOM Configuration Management Manufacturing Prototyping ERP MRP Mechanical Engineering Electrical Engineering Spacecraft Design +9 more Show less

SystemVerilog UVM OVM Python C++ Verilog VHDL SystemC Perl Linux Makefiles Formal Verification Generative AI 3GPP DSP RTL Design +11 more Show less

Digital Signal Processing MATLAB C/C++ Serdes RTL Firmware Communication Theory PAM FEC CDR PCIe IEEE 802.3 OIF Signal Processing Algorithms +9 more Show less

Signal Integrity FPGA Xilinx Altera HDL SERDES DDR3 DDR4 DDR5 I2C JTAG UART SPI PCIe eMMC Linux Mentor Graphics DxDesigner Vivado Quartus HyperLynx Sigrity PowerSI PowerDC ADS Ansys HFSS SPICE Python Perl +22 more Show less