GPU Design Implementation Methodology Engineer

Qualcomm

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$141,300–$211,900 / yr
Posted
4 days ago
Freshness
Confirmed live today
Closes
Apr 21, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $215k
This role $177k
$125k $294k
below market most similar roles pay here above market

This role pays less than 78% of similar roles. Most pay $177,250–$253,587 — the blue band above. At the midpoint, this role pays about $177k versus about $215k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · GPU Design Implementation Methodology Engineer

The GPU Design Implementation Methodology Engineer joins the Adreno GPU Silicon team to develop and drive advanced design methodologies, infrastructure, and automation. This role involves creating scalable solutions across synthesis, Static Timing Analysis, power, and physical design while applying these methodologies to real design challenges to achieve measurable Power, Performance, and Area improvements. The engineer will build agentic framework workflows for engineering analysis and automation, utilizing Python, TCL, and industry-standard EDA tools. Key responsibilities include investigating complex design problems, developing tool-agnostic methodologies, and translating large volumes of design data into actionable engineering insights. The position requires a strong understanding of digital design, RTL synthesis, and advanced-node VLSI design challenges to optimize GPU designs and improve overall engineering productivity.

What you'll do

  • Develop and drive advanced design methodologies, infrastructure, and automation for synthesis, STA, power, and physical design.
  • Apply infrastructure and analytics to identify measurable improvements in PPA, design flow, and engineering productivity.
  • Develop agentic framework workflows for engineering analysis and automation using AI methodologies.
  • Create scalable, tool-agnostic design infrastructure and reusable libraries using Python and TCL.
  • Investigate complex design problems to develop innovative, tool-agnostic methodology solutions.
  • Translate large volumes of design data into actionable engineering insights and dashboards.
  • Drive targeted initiatives for PPA optimization and clock structure network analysis.

What we're looking for

  • Bachelor's degree in a related field and 2+ years of relevant engineering experience, Master's degree and 1+ year, or a PhD.
  • Strong programming and scripting skills using Python, TCL, or similar languages.
  • Working knowledge of ASIC design, RTL synthesis, physical design, STA, and power analysis.
  • Ability to develop scalable design infrastructure, automation, and reusable methodologies.
  • Experience or demonstrated ability to work across synthesis, STA, power, or physical-design domains.
  • Experience with industry-standard EDA tools for synthesis, timing analysis, formal verification, and physical design (preferred).
  • Experience developing reusable TCL/Python libraries and design-analysis infrastructure (preferred).
  • Exposure to AI/LLM-based engineering applications, AI agents, or agentic workflows (preferred).

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