CPU Cache Architect

Amd

Confirmed live yesterday High trust
Remote

Quick summary

Work type
Remote
Location
Fort Collins, CO
Salary
$200,000–$300,000 / yr
Posted
5 days ago
Freshness
Confirmed live yesterday
Closes
Oct 21, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $224k
This role $250k
$161k $315k
below market most similar roles pay here above market

This role pays more than 66% of similar roles. Most pay $193,850–$254,750 — the blue band above. At the midpoint, this role pays about $250k versus about $224k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

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View all roles at Amd

At a glance

TL;DR · CPU Cache Architect

The CPU Cache Architect joins the Cores Organization to serve as a technical expert in performance modeling, performance analysis, and microarchitecture development for next-generation cores and caches. This role involves collaborating with hardware and software engineers to optimize CPU, cache, and interconnect performance. Key responsibilities include developing cycle-accurate core, cache, and SoC performance simulators, as well as creating simulators at various abstraction levels. The architect will use these tools alongside analytical methods, emulation, and post-silicon observation to evaluate microarchitecture improvements and develop performance analysis methodologies for various workloads. Required skills include C++ programming, scripting, and computer architecture expertise. Candidates should also possess familiarity with Digital RTL Design, Software Development, and Verilog HDL to support the design of high-performance server, client, and gaming processors.

What you'll do

  • Optimize the performance of CPUs, caches, and interconnects with hardware and software engineers.
  • Develop and enhance cycle-accurate performance simulators for cores, caches, and SoCs.
  • Create simulators at various abstraction levels to support architectural development.
  • Evaluate microarchitecture improvements using simulators, analytical methods, emulation, and post-silicon observation.
  • Develop and improve tools and methodologies for analyzing workload performance.
  • Guide and mentor junior engineers within the organization.

What we're looking for

  • BS/MS/PhD in EE, CS, CSE, or a similar field (preferred).
  • Expertise in hardware design (preferred).
  • C++ programming and scripting language capabilities (preferred).
  • Computer architecture background with industry experience in architecting processors, caches, and interconnect (preferred).
  • Familiarity with Digital RTL Design, Software Development, and Verilog HDL (preferred).
  • Experience writing and debugging RTL (preferred).
  • Experience collaborating effectively with a diverse team across disciplines (preferred).
  • Strong analytical thinking, problem-solving skills, and excellent verbal and written communication skills.

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