CPU Cache Architect

Amd

Confirmed live today High trust

Remote

Quick summary

Work type: Remote
Location: Fort Collins, CO
Salary: $144,800–$217,200 / yr
Posted: 5 days ago
Freshness: Confirmed live today
Closes: Oct 21, 2027
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $225k

This role $181k

$128k $304k

below market most similar roles pay here above market

This role pays less than 82% of similar roles. Most pay $194,300–$254,750 — the blue band above. At the midpoint, this role pays about $181k versus about $225k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

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At a glance

TL;DR · CPU Cache Architect

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The CPU Cache Architect joins the Cores Organization to contribute to the development of next-generation cores and caches for server, client, and gaming businesses. This role involves performance modeling, performance analysis, and microarchitecture development to optimize CPUs, caches, and interconnects. Key responsibilities include developing and enhancing cycle-accurate core, cache, and SoC performance simulators at various abstraction levels. The architect will use these simulators alongside analytical methods, emulation, and post-silicon observation to evaluate microarchitecture improvements and develop performance analysis tools for specific workloads. Required skills include C++ programming, scripting, and computer architecture expertise. Candidates should also possess familiarity with Digital RTL Design, Verilog HDL, and software development. The work focuses on pushing chip performance boundaries through collaborative hardware and software engineering.

Skills

C++ Verilog HDL Digital RTL Design Computer Architecture SoC Performance Modeling Performance Analysis Emulation Post-silicon Observation Scripting Hardware Design Microarchitecture

What you'll do

Optimize the performance of CPUs, caches, and interconnects.
Develop and enhance cycle-accurate core, cache, and SoC performance simulators.
Create simulators at various abstraction levels for architectural analysis.
Evaluate microarchitecture improvements using simulators, analytical methods, and post-silicon observation.
Develop and improve tools and methodologies for performance analysis of workloads.
Guide and mentor junior engineers on the team.

What we're looking for

BS/MS/PhD in EE, CS, CSE (or similar) with expertise in hardware design (preferred).
Experience in performance modeling, performance analysis, and microarchitecture development.
Ability to develop and enhance cycle-accurate core, cache, and SoC performance simulators.
Ability to use simulators, analytical methods, emulation, and post-silicon observation to evaluate microarchitecture improvements.
Ability to develop and improve tools and methodology for performance analysis of workloads.
C++ programming and scripting language capabilities (preferred).
Computer architecture background with industry experience in architecting processors, caches, and interconnect (preferred).
Familiarity with Digital RTL Design, Software Development, and Verilog HDL (preferred).