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Active Keyword: CPU Server Physical Design Engineer Remove filter Location: Santa Clara Remove filter Clear all

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CPU Server Physical Design Clock Engineer

Qualcomm

Austin, TX +1 26 days ago $148,300–$222,500
Actively hiring Competitive pay
SPICE Python Kubernetes Terraform Docker CI/CD Prometheus Grafana PostgreSQL Git VLSI RTL Physical_Design Clocking_Solutions HDL Verilog SystemVerilog Cadence Synopsys Calibre
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CPU Server Physical Design Engineer

Qualcomm

Santa Clara, CA 62 days ago $167,100–$250,700
Actively hiring Competitive pay
C C++ Python Perl Verilog VHDL UVM SystemC Cadence Synopsys ModelSim Tensilica Instruction Extension (TIE) Linux
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CPU Server Physical Design Timing Engineer

Qualcomm

Santa Clara, CA 109 days ago $198,700–$298,100
Actively hiring Above market
TCL Perl Python Prime-time Tempus ICC2 Innovus STA AOCV POCV CTS ASIC Cross-talk noise Signal Integrity Layout Parasitic Extraction
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