Apple Inc

3,546 open roles Visit website

Employer

About Apple Inc

Published by FindRole · most recent listing · Methodology

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3546 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2746 roles with salary data.

Most-posted roles

How Apple Inc posts

Employer behavior measured from this employer’s own listings, including ones that have since closed.

77.4%
of open roles publish a salary range

Layoffs · WARN filings

Trending down

1,074 workers affected across 15 filings since 2023.

Source: U.S. Worker Adjustment and Retraining Notification (WARN) Act filings, via WARN Feed (CC BY 4.0).

Open roles

3,546 total

Graphics FE Implementation Engineer

Santa Clara, CA 44 days ago $150,400–$277,600
Actively hiring Confirmed live yesterday Trusted Above market
Verilog System Verilog Physical Synthesis PPA Optimization Static Timing Analysis STA DFT UPF Linting Logic Equivalence RTL Gate-Level Design Multi-clock Domain Multi-power Domain
3+ yrs exp

Graphics FE Implementation Engineer

Austin, TX 44 days ago
Actively hiring Confirmed live today Trusted
Verilog System Verilog Physical Synthesis PPA Optimization Static Timing Analysis STA DFT UPF Linting Logic Equivalence RTL Gate-Level Design Multi-clock Domain Multi-power Domain
3+ yrs exp

Graphics FE Implementation Engineer

Santa Clara, CA 44 days ago $129,300–$194,700
Actively hiring Confirmed live yesterday Trusted Below market
RTL to Netlist Verilog System Verilog Python Perl Tcl Synthesis Place and Route Static Timing Analysis Lint CDC ECO DFT CMOS VLSI Digital Logic Design Computer Architecture

Graphics FE Implementation Engineer

Austin, TX 44 days ago
Actively hiring Confirmed live today Trusted
RTL Verilog System Verilog Python Perl Tcl Synthesis Place and Route Static Timing Analysis Lint CDC ECO DFT CMOS VLSI Digital Logic Design Computer Architecture

GPU Physical Design Engineer, STA/Timing

Austin, TX 44 days ago
Actively hiring Confirmed live today Trusted
STA Timing Closure Physical Design RTL Synthesis DFT Clocking TCL Python Perl Shell Scripting ECO VLSI CMOS EDA Tools XALK POCVM ETMs

Mixed-Signal Behavioral Modeling Engineer

Beaverton, OR 44 days ago
Actively hiring Confirmed live today Low trust
SystemVerilog Python MATLAB SPICE PERL Digital Signal Processing Numerical Analysis Formal Equivalence Co-simulation Behavioral Modeling SERDES Data-converters Circuit Schematics
10+ yrs exp

GPU Performance Modeling Engineer

San Diego, CA 44 days ago $142,300–$263,300
Actively hiring Confirmed live today Low trust Competitive pay
C++ C SIMD Performance Modeling OpenGL OpenCL DirectX Metal Verilog VHDL Design Verification Scripting
3+ yrs exp

Silicon Validation Engineer

San Francisco, CA 44 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday Trusted Above market
SerDes NRZ PAM CTLE DFE FFE CDR Oscilloscope BERT USB PCIe DisplayPort Signal Integrity Python ATE
10+ yrs exp

Silicon Validation Engineer

Los Angeles, CA 44 days ago $175,000–$308,500
Actively hiring Confirmed live 2 days ago Trusted Above market
SerDes NRZ PAM CTLE DFE FFE CDR Oscilloscope BERT USB PCIe DisplayPort Signal Integrity Python ATE
10+ yrs exp

Signal Integrity Engineer, Memory Interface

San Diego, CA 44 days ago $175,000–$308,500
Actively hiring Confirmed live yesterday High trust Above market
Signal Integrity Power Integrity DDR LPDDR Python EM Simulation VNA TDR Real-time Scope Spectrum Analyzer Transmission Line Theory Silicon Floorplan Generative AI
10+ yrs exp

Signal Integrity Engineer, Memory Interface

Austin, TX 44 days ago
Actively hiring Confirmed live yesterday High trust
Signal Integrity Power Integrity DDR LPDDR EM Simulation Python VNA TDR Real-time Scope Spectrum Analyzer Transmission Line Theory Electrical Extraction Silicon Measurement Generative AI
10+ yrs exp

Signal Integrity Engineer, Memory Interface

San Francisco, CA 44 days ago $184,700–$324,800
Actively hiring Confirmed live today High trust Above market
Signal Integrity Power Integrity DDR LPDDR Python EM Simulation VNA TDR Real-time Scope Spectrum Analyzer Transmission Line Theory
10+ yrs exp

Research Engineer, Video Tone Mapping

San Diego, CA 44 days ago $175,000–$308,500
Actively hiring Confirmed live today High trust Above market
Python MATLAB C++ Image Signal Processor (ISP) Apple Neural Engine (ANE) Machine Learning HDR Encoding Image Processing Tone Mapping Color Science Algorithm Development
10+ yrs exp

Research Engineer, Video Tone Mapping

Cupertino, CA 44 days ago $184,700–$324,800
Actively hiring Confirmed live today High trust Above market
Python MATLAB C++ Image Signal Processor (ISP) Apple Neural Engine (ANE) Machine Learning HDR Tone Mapping Image Processing Color Science Algorithm Development
10+ yrs exp

Hardware Architect, Information Security

Sunnyvale, CA 44 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday High trust Above market
Embedded Systems DFT DFM DFR Firmware PCB Layout Cadence Schematic Entry Performance Modeling Simulation Tools Test & Measurement Equipment
8+ yrs exp

Hardware Architect, Information Security

Seattle, WA 44 days ago $175,000–$308,500
Actively hiring Confirmed live yesterday High trust Above market
Embedded Systems Firmware DFT DFM DFR Schematic Entry PCB Layout Cadence Hardware Specifications Test & Measurement Equipment Power Supply Design
8+ yrs exp

Timing Design Engineer

Cupertino, CA 44 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday Trusted Above market
STA ASIC Design Primetime Tcl Perl SDC Synthesis DFT Physical Design Timing Closure Signal Integrity RTL SoC Design
10+ yrs exp

DDR Design Engineer

Austin, TX 44 days ago
Actively hiring Confirmed live today Low trust
Verilog SystemVerilog RTL Design DDR PHY Logic Synthesis Timing Constraints DFT Equivalence Checking State Machines Clock Domain Crossing Assertions Static Checkers Silicon Bring-up Power Characterization
10+ yrs exp

Timing Design Engineer

Austin, TX 44 days ago
Actively hiring Confirmed live today Trusted
STA ASIC Design Timing Closure Primetime SDC Tcl Perl Synthesis DFT Physical Design Signal Integrity RTL Timing Constraints
10+ yrs exp

Senior Robotics Algorithm Engineer

Cupertino, CA 44 days ago $150,400–$277,600
Actively hiring Confirmed live today High trust Competitive pay
Machine Learning Robotics Swift LLMs Diffusion Models Motion Planning Optimization Graph Search Controls Linear Regression Decision Trees Apple Developer Tools AI Systems