Wireless RTL Design Engineer

Apple Inc

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Quick summary

Work type
On-site
Location
San Francisco, CA
Salary
$129,300–$225,300 / yr
Posted
40 days ago
Freshness
Confirmed live today

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $205k
This role $177k
$116k most similar roles pay here $255k

This role pays less than 59% of similar roles. Most pay $168,500–$241,750 — the shaded band above. At the midpoint, this role pays about $177k versus about $205k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3587 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2768 roles with salary data.

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At a glance

TL;DR · Wireless RTL Design Engineer

As a Wireless RTL Design Engineer, you will join the wireless silicon development team to create signal processing intensive designs for wireless communication SoCs featuring diverse connectivity technologies. Your daily responsibilities include writing specifications based on MATLAB/C system models, defining microarchitecture, and performing RTL logic design and verification support while running tools to ensure lint-free designs. You will collaborate with algorithm and software teams to optimize performance and power efficiency. The role requires expertise in fixed-point knowledge, bit-true verifications, and DSP communication algorithms. You must possess a strong understanding of modern design techniques for energy-efficient and low-power logic. Preferred skills include experience with front end CAD tools such as synthesis, CDC, and power analysis to solve complex technical challenges within the wireless SOC organization's hardware development pipeline.

What you'll do

  • Write technical specifications and documentation based on MATLAB/C system models.
  • Define microarchitectures for wireless communication SoCs.
  • Design RTL logic for signal processing intensive designs.
  • Provide verification support for RTL logic designs.
  • Run linting tools to ensure a clean, error-free design.
  • Optimize hardware for performance and power efficiency in collaboration with software teams.
  • Implement energy-efficient and low-power logic designs.

What we're looking for

  • Bachelor of Science degree and at least 3 years of relevant industry experience.
  • Knowledge and experience with fixed-point logic and bit-true verifications.
  • Understanding of DSP communication algorithms and the trade-offs between performance and complexity.
  • Knowledge of modern design techniques and energy-efficient, low-power logic design.
  • Excellent communication skills and a self-motivated attitude to work under aggressive schedules.
  • Experience in front-end CAD tools such as synthesis, CDC, and power analysis (preferred).

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