Wireless RTL Design Engineer

Apple Inc

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$122,700–$214,300 / yr
Posted
41 days ago
Freshness
Confirmed live today

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $205k
This role $168k
$108k most similar roles pay here $256k

This role pays less than 71% of similar roles. Most pay $168,500–$241,750 — the shaded band above. At the midpoint, this role pays about $168k versus about $205k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3683 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2845 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · Wireless RTL Design Engineer

As a Wireless RTL Design Engineer, you will join the wireless silicon development team to create signal processing intensive designs for wireless communication SoCs featuring diverse connectivity technologies. Your daily responsibilities include writing specifications based on MATLAB system models, defining microarchitecture, and performing RTL logic design and verification support while running tools to ensure lint-free designs. You will collaborate with algorithm and software teams to optimize performance and power efficiency. The role requires expertise in fixed-point knowledge, bit-true verifications, and DSP communication algorithms. You must possess skills in modern energy-efficient low power logic design and experience with front end CAD tools such as synthesis, CDC, and power analysis. This position focuses on developing highly energy efficient designs for wireless silicon within a vertically integrated engineering environment to solve complex hardware challenges.

What you'll do

  • Write technical specifications and documentation based on MATLAB/C system models.
  • Define microarchitectures for wireless communication SoCs.
  • Design RTL logic for signal processing intensive designs.
  • Provide support for RTL logic verification processes.
  • Run linting tools to ensure a clean, error-free design.
  • Optimize hardware for performance and power efficiency in coordination with software teams.
  • Implement energy-efficient and low-power logic designs.

What we're looking for

  • Bachelor of Science degree and at least 3 years of relevant industry experience.
  • Knowledge and experience with fixed-point systems and bit-true verifications.
  • Understanding of DSP communication algorithms and trade-offs between performance and complexity.
  • Knowledge of modern design techniques and energy-efficient, low-power logic design.
  • Excellent communication skills and the ability to work productively under aggressive schedules.
  • Experience in front-end CAD tools such as synthesis, CDC, and power analysis (preferred).

More like this

Similar roles

Wireless RTL Design Engineer

Apple Inc

Irvine, CA 41 days ago $122,700–$214,300
RTL MATLAB DSP VLSI Synthesis CDC Power Analysis Fixed-point Microarchitecture SoC Signal Processing
3+ yrs exp

Wireless RTL Design Engineer

Apple Inc

San Francisco, CA 41 days ago $129,300–$225,300
RTL MATLAB DSP VLSI Synthesis CDC Power Analysis Fixed-point Microarchitecture Signal Processing SoC
3+ yrs exp

Wireless SoC Design Engineer

Apple Inc

Los Angeles, CA 18 days ago $175,000–$308,500
SystemVerilog Verilog ASIC Design SoC Architecture RTL Design Low-Power Design UPF AXI AHB LINT CDC RDC EDA Tools Micro-architecture
10+ yrs exp

Wireless SoC Design Engineer

Apple Inc

San Diego, CA 18 days ago $175,000–$308,500
SystemVerilog Verilog ASIC Design SoC Architecture RTL Design Low-Power Design UPF AXI AHB LINT CDC RDC EDA Tools Micro-architecture Digital Design
10+ yrs exp

Wireless SoC Design Engineer

Apple Inc

Los Angeles, CA 18 days ago $122,700–$214,300
SystemVerilog Verilog ASIC Design SoC Architecture RTL Low-Power Design UPF AXI AHB LINT CDC RDC EDA Tools Micro-architecture Specification

Wireless SoC Design Engineer

Apple Inc

San Francisco, CA 18 days ago $184,700–$324,800
SystemVerilog Verilog ASIC Design SoC Architecture RTL Design Low-Power Design UPF AXI AHB LINT CDC RDC EDA Tools Micro-architecture Specification Digital Design
10+ yrs exp