Wireless MAC Design Engineer

Apple Inc

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Quick summary

Work type: On-site
Location: Sunnyvale, CA
Salary: $184,700–$324,800 / yr
Posted: 15 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $205k

This role $255k

$124k most similar roles pay here $346k

This role pays more than 99% of similar roles. Most pay $168,500–$241,750 — the shaded band above. At the midpoint, this role pays about $255k versus about $205k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3513 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2730 roles with salary data.

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At a glance

TL;DR · Wireless MAC Design Engineer

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The Wireless MAC Design Engineer joins the wireless silicon development team to create microarchitecture and area-efficient RTL for wireless communication SoCs. This role involves translating functional requirements into synthesizable Verilog or SystemVerilog while ensuring lint, CDC, RDC cleanliness, and timing closure through collaboration with synthesis teams. The engineer will support verification, prototyping, emulation, and post-silicon validation to ensure performance and power efficiency. Key technical skills include digital logic design fundamentals, multi-clock-domain logic resolution, and knowledge of tools like STA, LEC, and RTL simulation. Candidates should possess expertise in ASIC microarchitecture and low power design techniques such as dynamic power scaling. The role specifically addresses the development of wireless MAC layers for SoCs, requiring an understanding of industry standards including IEEE 802.11, 802.15, Bluetooth, or 3GPP to solve complex communication challenges.

Skills

Verilog SystemVerilog RTL Design ASIC Microarchitecture CDC RDC STA Synthesis Lint LEC 802.11 Bluetooth 3GPP Low Power Design Digital Logic Design Simulation Emulation

What you'll do

Create microarchitecture and RTL for wireless MAC digital logic based on functional requirements.
Write area-efficient and power-efficient RTL that is scalable for wireless communication SoCs.
Ensure design cleanliness by running tools for lint, CDC, and RDC checks.
Work with the synthesis team to review constraints and achieve timing closure.
Support verification, prototyping, and emulation teams during pre-silicon development phases.
Assist in post-silicon validation, system integration, and debugging efforts.
Address necessary silicon design revisions based on post-silicon results.

What we're looking for

BS in Electrical Engineering, Computer Engineering, or a related field.
10+ years of relevant industry experience.
Proficiency in digital logic design fundamentals.
Experience translating functional requirements into synthesizable Verilog or SystemVerilog RTL.
Knowledge of digital design flows including simulation, debug, synthesis, lint, STA, and LEC.
Ability to design multi-clock-domain logic and resolve CDC problems.
10+ years of experience in ASIC microarchitecture and RTL design (preferred).
Understanding of wireless standards, low power design techniques, and excellent communication skills (preferred).

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