This role pays less than
71%
of similar roles. Most pay
$180,000–$227,500
— the shaded band above.
At the midpoint, this role pays about
$187k
versus about
$204k
for comparable roles.
Based on 240 similar postings.
Employer
About Amazon Inc
Amazon Inc. is the world''s largest e-commerce and cloud computing company, operating the Amazon marketplace, AWS cloud platform, Prime subscription services, Alexa voice AI, and logistics infrastructure. Industry: E-Commerce & Cloud Computing
Amazon Inc currently has
457 open roles
on FindRole.
Listed pay typically runs
$143,700–$194,400
across 447 roles with salary data.
Technical Program Manager , Silicon Operations joins the Amazon Leo team to manage the lifecycle of satellite and ground terminal programs. This role involves owning the NPI-to-sustaining transition for ASIC programs, defining readiness criteria, and leading cross-functional teams through manufacturing milestones. The individual will lead dual-source qualification, navigate the full silicon development lifecycle from RTL to production, and drive sustaining KPIs like yield and cost while managing foundry and OSAT partnerships. Key technical requirements include experience with ASIC implementation in deep sub-micron nodes, digital design for communication systems, and verification using UVM. Required skills include Python, C, System C, MATLAB, and knowledge of serial protocols like SPI and I2C. The role addresses the complex challenge of ensuring supply resilience and managing silicon revisions within a low Earth orbit satellite broadband network infrastructure.
What does a Technical Program Manager earn in California?
Median $211325 from 72 postings across 20 companies.
Manage the NPI-to-sustaining transition for ASIC programs by defining readiness criteria and driving cross-functional teams through ramp-up milestones.
Lead end-to-end dual-source qualification including sample builds, reliability testing, correlation analysis, and production validation to ensure supply resilience.
Navigate the full silicon development lifecycle from RTL and tape-out through bring-up, characterization, and errata management.
Align ASIC sustaining deliverables with device-level PDP gates by synchronizing schedules across satellite and ground terminal programs.
Drive sustaining KPIs such as yield, DPPM, OTD, and cost while managing EOL planning and foundry business reviews.
Develop scalable mechanisms and reporting cadences to provide executive visibility into the health of sustaining programs.
What we're looking for
Candidates must be a U.S. citizen, national, permanent resident, or granted asylum/refugee status for export control compliance.
Bachelor's degree in Electrical Engineering or a related field is required.
7+ years of experience in ASIC implementation, synthesis, STA, and physical design in deep sub-micron nodes (16nm or smaller).
7+ years of experience in digital design, verification, and wireless communications systems.
8+ years of experience creating and maintaining automation frameworks for Post-Silicon Flow.
5+ years of experience with UVM, C, System C, and scripting; 3+ years of emulation experience.
Experience delivering products to high-volume production and managing the full silicon development lifecycle.
Proficiency in Python, MATLAB, and various communication protocols including SPI, I2C, I3C, and UART.
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