Senior Manager Packaging Engineering

Amd

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Austin, TX
Salary
$164,320–$246,480 / yr
Posted
14 days ago
Freshness
Confirmed live yesterday
Closes
Oct 12, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $206k
This role $205k
$147k $257k
below market most similar roles pay here above market

This role pays more than 55% of similar roles. Most pay $171,787–$239,887 — the blue band above. At the midpoint, this role pays about $205k versus about $206k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

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At a glance

TL;DR · Senior Manager Packaging Engineering

The Sr. Manager Packaging Engineering leads the design execution of next-generation Data Center GPU and MI programs. This leadership role involves managing cross-functional teams across design, Signal/Power Integrity, substrate vendors, and OSAT partners to deliver high-performance, high-complexity package designs. Key responsibilities include overseeing end-to-end program execution, mentoring a global team of engineers, and driving operational excellence through milestone tracking and risk management. The position requires expertise in semiconductor package design, high-speed design considerations, and multi-die integration, specifically for chiplets and 2.5D/3D integration. Candidates must utilize industry tools like Synopsys 3DICC and Cadence SiP/APD while championing AI/ML-enabled tools for layout optimization and predictive analytics. The role solves complex technical challenges in high-performance computing by ensuring design convergence, manufacturability, and yield optimization for advanced packaging technologies.

What you'll do

  • Lead end-to-end execution of multiple Data Center GPU and MI package design programs.
  • Manage schedule, quality, and cost targets while overseeing risk management and milestone tracking.
  • Lead, mentor, and develop a high-performing team of package design engineers across different geographies.
  • Coordinate with silicon, SI/PI, thermal, and mechanical teams to ensure design convergence.
  • Engage with OSAT and substrate vendors to optimize design feasibility, manufacturability, and yield.
  • Define and implement improved design methodologies and workflows to enhance execution efficiency.
  • Champion the adoption of AI/ML-enabled tools and automation for layout optimization and predictive analytics.
  • Provide regular program status, risks, and mitigation strategies to senior leadership.

What we're looking for

  • B.S. or higher in Electrical Engineering, Computer Engineering, Mechanical Engineering, or a related field.
  • Experience in semiconductor package design, with a focus on high-performance or data center products (preferred).
  • Experience leading teams and executing multiple concurrent complex projects in fast-paced environments (preferred).
  • Strong understanding of package layout, high-speed design considerations, and multi-die integration (preferred).
  • Experience with AI/ML applications in engineering workflows such as design automation or data analytics (preferred).
  • Experience in Data Center GPU, HPC, or advanced packaging technologies like chiplets and 2.5D/3D integration (preferred).
  • Hands-on experience with industry tools such as Synopsys 3DICC, Cadence SiP / APD, or equivalent (preferred).
  • Experience working with OSATs, substrate vendors, and manufacturing partners (preferred).

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