Packaging Engineer

Apple Inc

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Francisco, CA
Salary
$184,700–$324,800 / yr
Posted
63 days ago
Freshness
Confirmed live today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $182k
This role $255k
$121k $347k
below market most similar roles pay here above market

This role pays more than 94% of similar roles. Most pay $148,500–$216,250 — the blue band above. At the midpoint, this role pays about $255k versus about $182k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3497 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2702 roles with salary data.

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At a glance

TL;DR · Packaging Engineer

JOB TITLE: Packaging Engineer The Packaging Engineer joins the hardware team as a senior level IC packaging engineer to develop custom silicon packaging solutions for various consumer markets. This role involves interfacing between internal product design, quality, and supply chain teams while managing external suppliers to deploy new packaging technologies. Key responsibilities include defining package characteristics, specifications, and roadmaps based on performance, cost, and footprint requirements. The engineer will perform proof of concept builds, establish processes, conduct reliability testing, and perform yield analysis to qualify devices for high-volume manufacturing. Required expertise includes Wafer Bumping, Dielectric materials, and Wafer Level Chip Scale Packaging, specifically RDL and BEOL Assembly processes for Fan-In and Fan-Out designs. Proficiency in AutoCAD, APD, and multi-physics simulation is also preferred.

What you'll do

  • Define package characteristics based on module performance, cost, and footprint requirements.
  • Develop package specifications and long-term packaging roadmaps.
  • Manage external suppliers for package design, material selection, and process flow development.
  • Perform proof of concept builds, process qualifications, and reliability testing.
  • Analyze yields and implement enhancements to improve manufacturing performance.
  • Drive the transition of products from the conceptual stage to high-volume manufacturing.
  • Construct Designs of Experiments to select optimal materials and processes.

What we're looking for

  • BS degree and 10+ years of relevant industry experience.
  • M.S. or Ph.D. in mechanical engineering, physics, materials science, or similar disciplines with 10+ years of IC packaging experience (preferred).
  • Knowledge and hands-on experience with Wafer Bumping and Dielectric materials (preferred).
  • Hands-on knowledge of manufacturing assembly processes including back-grind, dicing, Flip Chip die attach, and molding (preferred).
  • In-depth knowledge of Wafer Level Chip Scale Packaging, including RDL and BEOL Assembly processes (preferred).
  • Expert level knowledge of common reliability failure modes and device physics (preferred).
  • Proven track record of bringing products from conceptual stages to high-volume manufacturing (preferred).
  • AutoCAD, APD, and multi-physics simulation knowledge (preferred).

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