SOC Architecture

Qualcomm

Confirmed live today Trusted

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$101,400–$152,200 / yr
Posted
29 days ago
Freshness
Confirmed live today
Closes
Mar 27, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $211k
This role $127k
$82k $283k
below market most similar roles pay here above market

This role pays less than 96% of similar roles. Most pay $174,875–$247,000 — the blue band above. At the midpoint, this role pays about $127k versus about $211k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · SOC Architecture

Role Posting Log in to save

The SOC Architecture role is situated within the infrastructure IP Team under the ASICS Engineering group. In this position, you will collaborate with hardware architects to gather and define deployment specifications and strategies for next-generation SoC infrastructure hardware IPs. Your daily responsibilities include coordinating with domain leads to ensure robust infrastructure deployment plans based on specific product requirements. You will work on critical components such as Interconnects (NOC), System Caches, Memory controllers, and System MMUs. The role requires a robust understanding of computer architecture, end-to-end ASIC design flows, and interconnect protocols. You must demonstrate skills in hardware-software feature trade-offs, programming languages for automation, and knowledge of Quality of Service, power management, security, and debug architectures within the silicon hardware design flow.

Skills

ASIC Design Computer Architecture SoC NOC SMMU ARM Architecture Firmware Power Management Verification

What you'll do

  • Define, model, and design digital and analog IP blocks for high-performance SoCs.
  • Optimize, verify, and validate IP development for low-power world-class products.
  • Gather and define deployment specifications for next-generation SoC infrastructure hardware.
  • Coordinate with domain leads to create robust infrastructure deployment plans based on product requirements.
  • Analyze hardware-software feature trade-offs and end-to-end silicon design flows.
  • Implement and document IP development for interconnects, system caches, and memory controllers.
  • Utilize programming languages to develop automation for the design and verification process.

What we're looking for

  • Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, or related work experience.
  • Master's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, or related work experience.
  • Robust understanding of computer architecture.
  • Basic understanding of end-to-end ASIC design flows.
  • Knowledge of SOC and Infrastructure IP (NOC, SMMU, Caches) HW architecture.
  • Exposure to some form of interconnect protocol.
  • Exposure to a programming language for automation.
  • Exposure to Quality of Service, Clocks, Power management, Security, and Debug architectures (preferred).

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