SoC Debug Engineer, Senior Staff

Qualcomm

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$174,400–$261,600 / yr
Posted
11 days ago
Freshness
Confirmed live today
Closes
Apr 14, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $199k
This role $218k
$139k $275k
below market most similar roles pay here above market

This role pays more than 70% of similar roles. Most pay $173,781–$223,700 — the blue band above. At the midpoint, this role pays about $218k versus about $199k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · SoC Debug Engineer, Senior Staff

The SoC Debug Engineer, Senior Staff joins the Silicon Validation team within the ASICS Engineering group to ensure the quality of SoC silicon for Server, Compute, and Mobile chipsets. This role involves leading bring-up, debugging, and failure analysis at the embedded platform level during both pre-Si and post-Si phases. Key responsibilities include performing RTL inspection, root-causing JTAG and Si exposure issues, and developing debug strategies to isolate failing components, PVT, and marginality issues. The candidate will perform real-time troubleshooting on server hardware, including motherboards, processors, and networking components. Required skills include experience with JTAG, logic analyzers, scopes, and signal generators, alongside proficiency in C, Assembly, Perl, and Python. The work focuses on solving complex hardware and low-level software issues within multi-die secure boot flows.

What you'll do

  • Lead bring-up and debug failures at the embedded platform level during pre-Si and post-Si phases.
  • Perform RTL inspection to root cause pre-Si debug issues and JTAG/Si exposure for post-Si issues.
  • Develop and lead debug strategies to help partners rapidly triage failures and isolate specific components.
  • Execute real-time debugging of server hardware including motherboards, processors, memory, and networking components.
  • Investigate manufacturing defects to determine root causes and implement corrective actions for product reliability.
  • Drive complex issues to root cause as the SysDebug lead for low-level software and hardware problems.
  • Use lab equipment such as logic analyzers, scopes, and signal generators to troubleshoot hardware.

What we're looking for

  • Master's degree in Computer Engineering and/or Electrical Engineering.
  • Bachelor's degree in Science, Engineering, or related field with 6+ years of ASIC design, verification, validation, or integration experience.
  • Master's degree in Science, Engineering, or related field with 5+ years of ASIC design, verification, validation, or integration experience (preferred).
  • PhD in Science, Engineering, or related field with 4+ years of ASIC design, verification, validation, or integration experience (preferred).
  • 9+ years of experience with pre-si and post-silicon enabling, bring-up, and analyzing failures at the embedded platform level.
  • Experience performing RTL inspection, debugging low-level software/hardware issues, and using JTAG and lab equipment like Logic Analyzers and Scopes.
  • Experience creating debug strategies for partners to triage failures, including PVT and marginality issues.
  • Strong programming in C, Assembly, Perl, or Python (preferred).

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