Static Timing Analysis and Spice CAD Engineer

Qualcomm

Quick summary

Work type: On-site
Location: San Diego, CA
Salary: $140,000–$210,000 / yr
Posted: 4 days ago
Closes: Dec 21, 2026
Nearby: 99+ roles within 25 mi

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $189k

This role $175k

$130k most similar roles pay here $231k

This role pays less than 62% of similar roles. Most pay $165,200–$212,500 — the shaded band above. At the midpoint, this role pays about $175k versus about $189k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 828 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 508 roles with salary data.

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At a glance

TL;DR · Static Timing Analysis and Spice CAD Engineer

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Join the dynamic Global CAD team at Qualcomm Technologies Inc., a role focused on enhancing Signoff solutions for Snapdragon chips used in billions of mobile devices. As a Senior CAD Engineer, you will refine Timing and Cell Characterization methodologies for various Snapdragon products, collaborating closely with Physical Design and Timing teams to develop cutting-edge tools and methodologies using Python and TCL scripting languages. Key responsibilities include enabling new cell characterization features through spice correlation, interfacing with EDA vendors, and setting up complex STA design regressions while driving initiatives in genAI/ML and hierarchical solutions for improved accuracy and efficiency. This role demands expertise in STA features, deep knowledge of Signoff Timing processes, and 2-6 years of relevant experience in SoC development at advanced process nodes.

Skills

Python TCL STA EDA SPICE Regression Scripting CAD Hierarchical_solution GenAI/ML CI/CD Version_control Bug_tracking Collaboration_tools Simulation Verification Design_Analysis Vendor_Interface Methodology_Development

What you'll do

Improve Timing and Cell Characterization methodologies for various Snapdragon chips.
Validate new cell characterization features through spice correlation and CAD development.
Analyze and address design teams' requests via ticket queues efficiently.
Interface with EDA vendors to enable production-ready tool sets for projects.
Set up, maintain, and enhance regression of complex STA designs continuously.
Drive resolution of Signoff problems faced by Snapdragon design teams.

What we're looking for

2-6 years of experience in SoC Signoff Timing at top-level or block-level.
Deep knowledge of STA features and timing concepts.
Experience with Python and TCL scripting for CAD development.
Participation in enabling new cell characterization methodologies and features.
Interface with EDA vendors to resolve production issues.
Establish expertise in STA or spice issue resolution.
Collaborate on R&D initiatives with the AI team for compute optimization.

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