SerDes System Validation Engineer

SerDes System Validation Engineer will join the Analog-Mixed/Signal design team to perform validation and debug of embedded circuits. This role involves ownership of SerDes system bring-up, verification of basic operations, and analyzing robustness and margins within a system environment. The engineer will collaborate with design teams to understand architecture, define DFT needs for improved testability, and participate in mixed-signal verification tasks to ensure pre-silicon coverage. Key technical requirements include expertise in high-speed serial links, including PCIe, USB, DP, and MPHY protocols. Candidates should possess knowledge of Tx/Rx equalization techniques like CTLE and DFE, as well as CDR architectures. The role requires experience with analog mixed-signal circuit blocks such as LDO regulators, amplifiers, and ADCs, alongside skills in scripting and automation to enhance efficiency during lab testing and data analysis.