SerDes Design and Validation Engineer

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: Beaverton, OR
Posted: 2 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

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Similar $194k

$137k most similar roles pay here $235k

This listing doesn't post a salary. Most similar roles pay $162,000–$225,850.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3553 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2740 roles with salary data.

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TL;DR · SerDes Design and Validation Engineer

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The SerDes Design and Validation Engineer joins the hardware team to lead system validation of mixed-signal SerDes IP. This role involves designing, integrating, and validating high-performance analog and mixed-signal circuits for SerDes PHY applications, including receivers, transmitters, bias generators, and high-speed clock distribution networks. The engineer will develop analog DFT circuits, create test plans, analyze data to ensure robust IP design, and manage system bring-up, validation, and debugging in collaboration with production test teams. Key technical requirements include expertise in high-speed serial links, mixed-signal circuit blocks like LDOs and amplifiers, and digitally assisted analog designs such as LMS based adaptive loops. The role requires proficiency in Tx/Rx equalization techniques like CTLE and DFE, knowledge of PCIe, USB, DP, and MPHY protocols, and the ability to use scripting for automation.

Skills

SerDes Mixed-Signal Analog Design DFT ATE PCIe USB MPHY CTLE DFE CDR Scripting Automation System Validation

What you'll do

Lead the system bring-up, validation, and debugging of mixed-signal SerDes IP.
Design and optimize high-performance analog circuits including receivers, transmitters, and clock distribution networks.
Develop analog DFT circuits and techniques to ensure comprehensive PHY validation and first-time silicon success.
Create test plans and analyze data to guarantee robust IP design and performance metrics.
Collaborate with production test teams to debug complex design and system bring-up issues.
Perform mixed-signal verification to understand SerDes operation and interaction with control logic.
Implement high-speed serial link features such as Tx/Rx equalization, CDR architectures, and various protocols like PCIe or USB.

What we're looking for

Bachelor of Science degree.
Minimum of 10 years of relevant industry experience.
Experience designing analog mixed-signal circuit blocks such as Bandgap, LDOs, amplifiers, and oscillators (preferred).
Understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, and low-power techniques (preferred).
Experience with digitally assisted analog design concepts like background calibrations and LMS based adaptive loops (preferred).
Hands-on experience in lab/production testing, debug, and data analysis (preferred).
Experience in AMS IC development from definition to high-volume production (preferred).
Knowledge of high-speed SerDes protocols, equalization techniques, scripting, or AI/ML applications (preferred).