SerDes Design and Validation Engineer

What you'll do

• Lead the system bring-up, validation, and debugging of mixed-signal SerDes IP.
• Design and optimize high-performance analog circuits including receivers, transmitters, and clock distribution networks.
• Develop analog DFT circuits and techniques to ensure comprehensive PHY validation and first-time silicon success.
• Create test plans and analyze data to guarantee robust IP design and performance metrics.
• Coordinate with production test teams to debug complex design and system bring-up issues.
• Perform mixed-signal verification to understand SerDes operation and interaction with control logic.
• Execute lab and production testing, including bench evaluation, correlation, and characterization.

What we're looking for

• Bachelor of Science degree and at least 10 years of relevant industry experience.
• Experience designing analog mixed-signal circuit blocks such as Bandgap, LDOs, amplifiers, and oscillators (preferred).
• Understanding of analog mixed-signal concepts including mismatch mitigation, linearity, stability, and low-power techniques (preferred).
• Experience with digitally assisted analog design concepts like background calibrations and LMS based adaptive loops (preferred).
• Hands-on experience in lab/production testing, debug, and data analysis (preferred).
• Experience in AMS IC development from definition to high-volume production including layout supervision and characterization (preferred).
• Skills in scripting and automation to enhance efficiency (preferred).
• Knowledge of high-speed SerDes protocols like PCIe, USB, DP, and MPHY; Tx/Rx equalization; and CDR architectures (preferred).