SerDes Design and Validation Engineer

What you'll do

• Lead the system bring-up, validation, and debugging of mixed-signal SerDes IP.
• Design and optimize high-performance analog circuits including receivers, transmitters, and clock distribution networks.
• Develop analog DFT circuits and techniques to ensure robust PHY validation and first-time silicon success.
• Perform mixed-signal verification to analyze SerDes operation and interaction with higher-level control logic.
• Create test plans and analyze data to guarantee high-performance power, performance, and area metrics.
• Drive lab and production testing while debugging complex design and system bring-up issues.
• Implement equalization techniques such as CTLE, DFE, and de-emphasis for high-speed serial links.

What we're looking for

• Bachelor of Science degree and at least 10 years of relevant industry experience.
• Experience in high-speed serial links with knowledge of protocols like PCIe, USB, DP, and MPHY (preferred).
• Expertise in designing analog mixed-signal circuit blocks such as Bandgap, LDOs, amplifiers, and oscillators (preferred).
• Understanding of analog mixed-signal concepts including mismatch mitigation, linearity, stability, and low-power techniques (preferred).
• Experience with digitally assisted analog design concepts like background calibrations and LMS based adaptive loops (preferred).
• Hands-on experience in lab/production testing, debug, data analysis, and AMS IC development from definition to production (preferred).
• Skills in scripting and automation to enhance efficiency (preferred).
• Knowledge of Tx/Rx equalization techniques, CDR architectures, and firmware assisted mixed signal IP development (preferred).