SerDes Circuit Design Engineer

Apple Inc

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$122,700–$214,300 / yr
Posted
1 day ago
Freshness
Confirmed live today

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $196k
This role $168k
$110k $246k
below market most similar roles pay here above market

This role pays less than 69% of similar roles. Most pay $164,500–$227,900 — the blue band above. At the midpoint, this role pays about $168k versus about $196k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3515 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2718 roles with salary data.

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At a glance

TL;DR · SerDes Circuit Design Engineer

The SerDes Circuit Design Engineer joins the high-speed SerDes team to develop next-generation high-performance wireline transceivers for system-on-chip intellectual property. This role involves collaborating with cross-functional teams to create and execute state-of-the-art analog mixed-signal IPs. Key responsibilities include evaluating circuit topologies for Rx, CDR, Tx, bias generators, and high-speed clock generation while optimizing for power, performance, and area. The engineer will perform transistor-level implementation, behavioral modeling, and mask design. Required technical skills include experience with FinFet technology, high-speed serial links, and circuit blocks like LDOs, ADCs, and DACs. Candidates should be proficient in SystemVerilog, Matlab, Python, and VerilogAMS. The work focuses on solving complex high-speed serial I/O challenges for 64+ Gbps NRZ and PAM applications using protocols like PCIe and USB.

What you'll do

  • Evaluate different circuit topologies for SerDes PHY requirements including Rx, CDR, Tx, and bias generators.
  • Execute transistor-level implementation and behavioral modeling for high-performance AMS circuits.
  • Create block-level specifications in coordination with architecture, SIPI, packaging, and board design teams.
  • Drive mask design to implement the layout view of complex integrated circuits.
  • Deliver IP views to SOC teams while ensuring all designs meet strict quality standards.
  • Perform circuit modeling and performance evaluation using tools like SystemVerilog, Matlab, and Python.
  • Conduct lab testing, debugging, and data analysis for high-speed serial I/O.
  • Supervise layout, bench evaluation, and characterization from definition to high-volume production.

What we're looking for

  • Minimum requirement of a bachelor's degree.
  • Deep understanding of analog mixed-signal design with experience in high-speed serial links (preferred).
  • Experience designing analog mixed-signal circuit blocks like Bandgap, LDOs, amplifiers, and ADCs (preferred).
  • Understanding of mismatch mitigation, linearity, stability, and low-power/low-noise techniques (preferred).
  • Experience with high-speed digital circuits and digitally assisted analog design concepts (preferred).
  • Knowledge of Tx/Rx equalization, CDR architectures, and high-speed SerDes protocols (preferred).
  • Experience in AMS IC development from definition to production, including layout supervision and bench evaluation (preferred).
  • Experience with circuit modeling tools like SystemVerilog, Matlab, Python, or VerilogAMS (preferred).

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