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About General Dynamics
General Dynamics is a global aerospace and defense company offering a broad portfolio of products and services in business aviation, ship construction, land combat vehicles, and information technology. It serves customers in the U.S. government, allied governments, and a diverse array of commercial markets.
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As a Senior Technical Manager - FPGA, you will lead the FPGA function responsible for the architecture, design, implementation, verification, and sustainment of programmable logic used in airborne systems. You will provide direct supervision for personnel within a matrixed environment, translating department vision into clear objectives while managing performance, talent development, and workload planning. Your daily work involves ensuring designs meet rigorous safety, cybersecurity, and airworthiness requirements through disciplined engineering practices like requirement traceability, timing closure, and hardware/software co-design. You will utilize technical expertise in VHDL, Verilog, or SystemVerilog, along with simulation, synthesis, and verification methodologies to manage the full development lifecycle. The role addresses complex technical challenges in airborne systems by coordinating across multi-disciplinary teams to manage risk, integration priorities, and technology roadmaps for high-performance programmable logic solutions.
Lead the FPGA function for architecture, design, implementation, verification, and sustainment of programmable logic in airborne systems.
Provide direct supervision and performance management for individual contributors and technical managers within a matrixed environment.
Develop and maintain the functional demand and capacity view to identify staffing gaps and manage recruitment efforts.
Establish execution expectations for FPGA development by balancing performance, resource utilization, power, and schedule requirements.
Ensure all design and verification activities meet customer, quality, safety, cybersecurity, and airworthiness standards.
Drive disciplined engineering practices including requirements traceability, coding standards, simulation, timing closure, and hardware/software co-design.
Monitor execution through objective measures such as demand-versus-capacity, requirement maturity, and defect trends.
Lead technical reviews, technology roadmaps, tool strategies, and bid/proposal activities for the FPGA department.
What we're looking for
U.S. citizenship is required.
Ability to obtain a Department of Defense Secret security clearance.
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline plus 8 years of experience; or Master's degree plus 6 years of experience.
Demonstrated engineering leadership including people development, performance management, workload planning, and staffing coordination.
Expertise with FPGA development lifecycles, VHDL/Verilog/SystemVerilog, simulation, synthesis, timing analysis, verification, and hardware/software integration.
Experience with airborne or defense programs and development assurance standards such as DO-254 (preferred).
Experience with UVM, coverage-driven verification, formal methods, and FPGA toolchains from major vendors (preferred).
Experience with high-speed interfaces, RF/digital subsystems, or board-level hardware integration (preferred).