Senior Staff Formal Verification Engineer

Qualcomm

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Diego, CAAustin, TXSanta Clara, CA
Salary
$203,700–$305,500 / yr
Posted
40 days ago
Freshness
Confirmed live today
Closes
Mar 16, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $200k
This role $255k
$131k $324k
below market most similar roles pay here above market

This role pays more than 91% of similar roles. Most pay $177,200–$223,000 — the blue band above. At the midpoint, this role pays about $255k versus about $200k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

Most-posted roles

View all roles at Qualcomm

At a glance

TL;DR · Senior Staff Formal Verification Engineer

The Senior Staff Formal Verification Engineer joins the GPU ASICS Engineering team to deploy formal methods on next-generation GPU designs. This role involves identifying critical graphics areas for verification, strategizing formal property verification test plans, and developing assertion-based verification testbenches. The engineer will debug RTL artifacts, achieve formal sign-off matrices, and collaborate with global system architecture, RTL design, and DV teams. Key responsibilities include engaging with EDA vendors to explore innovative methodologies and solving formal proof complexity using abstraction techniques. Required skills include proficiency with industry-standard formal tools, writing SystemVerilog Assertions, and deep bug-hunting. Candidates should possess experience in 3D graphics hardware pipelines and potentially other formal applications like DPV, C2RTL SEQ, and RTL2RTL SEQ to ensure high-performance video streaming and advanced graphics.

What you'll do

  • Develop a deep understanding of 3D Graphics hardware pipelines, feature sets, and data paths.
  • Identify critical Graphics areas to verify using Formal methods.
  • Develop Formal Property Verification (FPV) test plans and assertion-based verification testbenches.
  • Debug all RTL artifacts and achieve formal sign-off matrices.
  • Write SystemVerilog Assertions and apply abstraction techniques to solve formal proof complexity.
  • Perform deep bug-hunting and coverage closure to achieve sign-off.
  • Explore innovative DV methodologies and engage with EDA vendors to improve sign-off quality.

What we're looking for

  • Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 6+ years of relevant work experience.
  • Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 5+ years of relevant work experience.
  • PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of relevant work experience.
  • Hands-on experience in strategizing, brainstorming, and developing Formal Property Verification (FPV) test-plans and assertion-based verification testbenches.
  • Proficiency with industry standard formal tools and experience writing SystemVerilog Assertions.
  • Experience solving formal proof complexity using abstraction techniques, bug-hunting, coverage closure, and achieving sign-off.
  • Prior knowledge of GPU Architecture (preferred).
  • Hands-on experience in other formal applications like DPV, C2RTL SEQ, and RTL2RTL SEQ (preferred).

More like this

Similar roles

Senior Formal Verification Engineer

Nvidia

Santa Clara, CA 125 days ago
Formal Verification System Verilog Verilog RTL Python TCL Perl CPU Architecture Formal Verification Methodologies Assertions Testplans Scripting Post-silicon Verification
5+ yrs exp

Senior Formal Verification Engineer

Nvidia

Santa Clara, CA +1 34 days ago $136,000–$218,500
Formal Verification System Verilog Verilog RTL TCL Python Perl CPU Architecture Formal Verification Methodologies Assertions Testplans Scripting Post-silicon Verification
5+ yrs exp

Senior Formal Verification Engineer

Nvidia

CA +4 113 days ago $196,000–$310,500
Formal Verification SystemVerilog Assertions (SVA) ASIC Verification Python Tcl VC Formal RTL FPV Datapath Verification LPU Architecture Formal Property Verification Silicon Bring-up Debug
10+ yrs exp Hybrid

Lead Formal Verification Engineer

Amd

Austin, TX +2 18 days ago $200,000–$300,000
Formal Verification SystemVerilog Assertions (SVA) JasperGold VC Formal Murphi Computer Architecture GPU CPU Equivalence Checking Property Development Theorem Provers Digital Design Automation Security Verification

Senior Formal Verification Engineer

Nvidia

CA +5 113 days ago $136,000–$218,500
Formal Verification SystemVerilog Assertions (SVA) ASIC Verification JasperGold VC Formal RTL LPU Architecture Datapath Verification Silicon Bring-up Debug AI Tools
5+ yrs exp Hybrid

CPU Formal Verification Engineer

Qualcomm

Santa Clara, CA 40 days ago $147,900–$221,900
Formal Verification Model Checking Theorem Proving Jaspergold VC-Formal ACL2 HOL C++ Python TCL Hardware Description Languages Microprocessor Architecture Instruction Set Architecture Floating-Point Math Memory Consistency Memory Coherency Security Architectures Automation
8+ yrs exp