Senior System Verification Engineer

Nvidia

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$168,000–$264,500 / yr
Employment
Full-time
Posted
6 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $192k
This role $216k
$130k $279k
below market most similar roles pay here above market

This role pays more than 79% of similar roles. Most pay $168,425–$216,250 — the blue band above. At the midpoint, this role pays about $216k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1792 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1179 roles with salary data.

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At a glance

TL;DR · Senior System Verification Engineer

JOB TITLE: Senior System Verification Engineer The Senior System Verification Engineer joins the Emulation division to support multiple emulation environments using advanced techniques. The role involves bringing up GPUs, SOCs, Switches, and NICs on emulation while root causing system level test failures and emulator environment issues. Key responsibilities include verifying high-speed protocols like PCIe, CXL, NVLINK, IB, and Ethernet, alongside low-speed protocols such as I2C, I3C, SPI, and UART. The engineer will debug CPU and GPU coherency issues and write monitors and checkers to aid hardware test debugging. Required technical skills include proficiency in Verilog, VHDL, C/C++, and SystemVerilog, with experience in UVM verification environments and scripting using Perl and Python. Candidates must possess knowledge of Zebu emulation for SOC and CPU systems.

What you'll do

  • Support multiple emulation environments using C/C++ DPI Transactors, SV assertions, and Accelerated UVM Testbenches.
  • Bring up and verify GPUs, SOCs, Switches, and NICs on emulation platforms.
  • Root cause system-level test failures and emulator environment issues.
  • Bring up and verify high-speed protocols including PCIe, CXL, NVLINK, IB, and Ethernet.
  • Debug issues related to CPU and GPU coherency and low-speed protocols like I2C and SPI.
  • Lead emulation vendors to debug issues using various specialized tools.
  • Write monitors and checkers to aid in debugging hardware test issues and firmware/software bring-up.

What we're looking for

  • M.S. or equivalent experience in Electrical Engineering, Computer Science, Computer Engineering, or a related field.
  • 8+ years of proven experience in a relevant field.
  • Proficiency in Verilog and/or VHDL, C/C++, and SystemVerilog.
  • Knowledge of at least one high-speed interface: PCIe, CXL, NVLINK, IB, or Ethernet.
  • Knowledge of low-speed protocols such as I2C, I3C, SPI, UART, and BMC interaction in server platforms.
  • Working knowledge of CPU-GPU coherency.
  • Experience with UVM verification environments and scripting with Perl, Python, and C/C++.
  • Experience with Zebu emulation for SOC/CPU.

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