As a Senior System Verification Engineer in NVIDIA's Emulation division based in Santa Clara, CA, you will support multiple emulation environments using advanced techniques such as C/C++ DPI Transactors, SV assertions, Coverage, Power Estimation, SpeedBridges, and Accelerated UVM Testbenches. Your daily tasks include bringing up GPUs, SOCs, Switches, NICs on emulation platforms, debugging high-speed protocols like PCIe/CXL/NVLINK/IB/Ethernet, and low-speed protocols such as I2C/I3C/SPI/UART. You will collaborate closely with Design, DV, Power, Silicon Validation, Performance, and Software teams to resolve complex issues related to CPU-GPU coherency and work constructively with emulation vendors using various tools. Essential skills include proficiency in Verilog/VHDL, C/C++, SystemVerilog, UVM verification environments, scripting with Perl/Python, and experience with Zebu emulation for SOC/CPU. This role demands expertise in hierarchical design approaches and top-down SoC/system-level verification to ensure robust system functionality across diverse hardware interfaces.
Skills
C
C++
SystemVerilog
Verilog
VHDL
Perl
Python
UVM
PCIe
CXL
NVLink
IB
Ethernet
I2C
I3C
SPI
UART
Zebu_emulation
What you'll do
Support multiple emulation environments using advanced techniques like C/C++ DPI Transactors and SV assertions.
Root cause system-level test failures and resolve emulator environment issues for GPUs, SOCs, Switches, NICs.
Bring up and verify high-speed protocols such as PCIe, NVLink, and Ethernet in complex systems.
Debug and resolve CPU-GPU coherency issues during emulation and verification phases.
Write monitors and checkers to aid in hardware test issue debugging and firmware/software bring-up.
What we're looking for
M.S. or equivalent experience in EE/CS/CE with 8+ years in verification.
Proficient in Verilog/VHDL, C/C++, SystemVerilog for emulation environments.
Knowledge of high-speed protocols (PCIe/CXL/NVLink) and low-speed protocols.
Experience with UVM verification environments and scripting in Perl, Python.
Familiarity with hierarchical design approach, SoC/system level verification.
Zebu emulation experience with SOC/CPU and debugging skills for vendors.
Market check
Salary context
This
$168,000–$264,500
range sits above
82%
of similar postings on FindRole.
Peer median band
$117,000–$210,665
Median floor and ceiling across peers.
Typical midpoint (25–75%)
$139,050–$196,750
Middle half of comparable postings.
Based on 240 comparable postings.*
* 240 is the maximum number of comparable postings sampled.
Employer
About Nvidia
Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing
Nvidia currently has
802 open roles
on FindRole.
Listed pay typically runs
$184,000–$287,500
across 798 roles with salary data.
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