System Verification Engineer

Nvidia

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$136,000–$218,500 / yr
Posted
46 days ago

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Competitive pay

How this pay compares to similar roles

Similar $168k
This role $177k
$118k most similar roles pay here $229k

This role pays more than 62% of similar roles. Most pay $137,250–$197,875 — the shaded band above. At the midpoint, this role pays about $177k versus about $168k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 860 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 848 roles with salary data.

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At a glance

TL;DR · System Verification Engineer

As a System Verification Engineer at NVIDIA's Emulation division in Santa Clara, CA, you will support multiple emulation environments using advanced techniques such as C/C++ DPI Transactors, SV assertions, and UVM testbenches. Your daily tasks include bringing up GPUs, SOCs, switches, NICs on emulators, debugging high-speed protocols like PCIe, NVLink, and Ethernet, and low-speed protocols including I2C and SPI. You will collaborate closely with design, DV, power validation, performance, and software teams to ensure system-level test success and work with emulation vendors to debug issues using various tools. Proficiency in Verilog or VHDL, C/C++, SystemVerilog, UVM verification environments, and scripting languages like Perl and Python is essential, along with knowledge of CPU-GPU coherency protocols such as ARM CHI. This role demands expertise in hierarchical design approaches and SoC/system-level verification to contribute to NVIDIA’s cutting-edge technology solutions.

What you'll do

  • Bring up GPUs, SOCs, Switch, NIC on emulation and debug system level test fails.
  • Verify high-speed protocols like PCIe/CXL/NVLINK/IB/Ethernet in emulation environments.
  • Debug low-speed protocols such as I2C/I3C/SPI/UART during bring-up processes.
  • Resolve issues related to CPU and GPU coherency, preferably with ARM CHI protocol knowledge.
  • Write monitors and checkers to aid in debugging hardware test issues and firmware/software bring-up.

What we're looking for

  • M.S. or equivalent experience in Electrical Engineering, Computer Science, or related field with 4+ years.
  • Proficient in Verilog/VHDL, C/C++, and SystemVerilog.
  • Knowledge of high-speed protocols (PCIe/CXL/NVLink/IB/Ethernet) and low-speed protocols (I2C/I3C/SPI/UART).
  • Experience with UVM verification environments and scripting in Perl, Python, and C/C++.
  • Familiarity with hierarchical design approach, top-down design, SoC, and system-level verification.
  • Working knowledge of CPU-GPU coherency, preferably ARM CHI coherency protocol.
  • Zebu emulation experience with SOC/CPU.

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