Senior SRAM Engineer

Nvidia

Confirmed live today High trust
Remote

Quick summary

Work type
Remote
Location
Santa Clara, CA
Salary
$196,000–$310,500 / yr
Employment
Full-time
Posted
64 days ago
Freshness
Confirmed live today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $198k
This role $253k
$141k $329k
below market most similar roles pay here above market

This role pays more than 95% of similar roles. Most pay $177,250–$218,700 — the blue band above. At the midpoint, this role pays about $253k versus about $198k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

Most-posted roles

View all roles at Nvidia

At a glance

TL;DR · Senior SRAM Engineer

The Senior SRAM Engineer joins the Full Custom Memory team to design specialized RAM implementations for a wide array of processing chips. This role involves designing best-in-class SRAM circuits using state-of-the-art technology processes while optimizing for performance, area, and power. You will collaborate with mask designers to craft high quality, dense pitch-matched layouts and verify functionality, electrical integrity, and robustness. Key responsibilities include improving flows and methodologies for design automation, data collection, and analysis to ensure working silicon. Required skills include circuit design experience, SRAM memory design techniques, and macro or block development. You should be proficient with Cadence Virtuoso, SPICE simulators, and waveform viewers. Additionally, the role requires experience with Static Timing Analysis, EM and IR analysis, Formal Functional Verification, and scripting in Perl, Python, Shell, or Verilog.

What you'll do

  • Design best-in-class SRAM circuits using state-of-the-art technology processes.
  • Optimize circuits for performance, area, and power requirements.
  • Collaborate with mask designers to create high-quality, dense, pitch-matched layouts.
  • Verify circuit functionality, electrical integrity, and robustness.
  • Develop flows and methodologies to streamline design automation and data collection.
  • Analyze data to ensure the production of working silicon.

What we're looking for

  • BS/MS/PhD in Electrical or Computer Engineering or equivalent experience.
  • Minimum 12 years of circuit design experience.
  • Strong understanding of SRAM and memory design techniques and macro/block development.
  • Experience designing SRAM circuits using state-of-the-art technology processes.
  • Experience optimizing circuits for performance, area, and power.
  • Experience collaborating with mask designers for high quality and dense pitch-matched layout.
  • Experience developing flows for Static Timing Analysis, EM/IR analysis, and Formal Functional Verification (preferred).
  • Experience with scripting languages such as Perl, Python, Shell, or Verilog (preferred).

More like this

Similar roles

Senior SRAM Engineer, Circuit Design

Nvidia

Santa Clara, CA 34 days ago $136,000–$218,500
Circuit Design Cadence Virtuoso Python Perl SPICE Static Timing Analysis EM and IR Analysis Formal Verification Layout Data Analysis Memory Design
3+ yrs exp

SRAM Design Engineer

Nvidia

Santa Clara, CA 12 days ago $116,000–$189,750
SRAM Design Cadence Virtuoso Transistor-level Circuit Design Layout Capture Logical Verification Silicon Testing SRAM Compiler Development SOC Design Codex Claude Code Debug
2+ yrs exp

Senior Memory System Engineer

Nvidia

Santa Clara, CA 36 days ago $184,000–$287,500
DDR LPDDR HBM Memory Controller PHY ASIC Python C C++ ECC SI PI Firmware SOC Failure Analysis PCB Layout Cache
10+ yrs exp Hybrid

Senior ASIC Design Engineer, Memory Subsystem

Nvidia

Santa Clara, CA 14 days ago $136,000–$218,500
ASIC Design RTL Design Verilog VHDL Synthesis Timing Analysis CHI CXL PCI-E PERL CAD Tools Hardware-managed Coherency System Level Caches Protocol Bridges Asynchronous Interfaces
5+ yrs exp

Senior Circuit Design Engineer

Nvidia

Santa Clara, CA 8 days ago $136,000–$218,500
Circuit Design RTL Layout Spice EM/IR Analysis Static Timing Analysis PnR Logic Synthesis Python Perl Tcl Make Power Gating DRC LVS Post-Silicon Characterization Hardware Security AI/ML
5+ yrs exp Hybrid

SRAM Circuit Design Engineer

Apple Inc

Santa Clara, CA 122 days ago $150,400–$277,600
SRAM Design SoC Design RTL Circuit Design Schematic Capture DFT IR/EM Machine Learning Silicon Debug Memory Hierarchy Scripting
3+ yrs exp