Senior Product Development Engineer, Datacenter Boards

Nvidia

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$136,000–$212,750 / yr
Employment
Full-time
Posted
146 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $192k
This role $174k
$124k $249k
below market most similar roles pay here above market

This role pays less than 67% of similar roles. Most pay $158,460–$226,087 — the blue band above. At the midpoint, this role pays about $174k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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At a glance

TL;DR · Senior Product Development Engineer, Datacenter Boards

The Senior Product Development Engineer - Datacenter Boards joins the Operations NPI team to manage module and board NPI for datacenter and HPC products. This role involves overseeing the transition from first-article to mass production, ensuring accountability for yield targets, quality gates, and on-time delivery. Key responsibilities include defining manufacturing test plans, analyzing volume manufacturing data, and performing root-cause analysis across silicon, PCB, and system layers to drive DFM and DFT improvements. Candidates must possess experience in server architectures, PCB design, SMT, assembly process engineering, and high-speed interface validation including PCIe, NVLink, Ethernet, and PAM4. Required skills include Power Integrity analysis, thermal characterization, and test setup automation. Proficiency in Python for manufacturing analytics and experience with HBM or LPDDR memory solutions are also highly valued.

What you'll do

  • Manage module and board NPI from first-article through mass production ramp.
  • Account for yield targets, quality gates, and on-time delivery for datacenter products.
  • Define and improve manufacturing test plans balancing coverage, test-time, cost, and yield.
  • Partner with global CM sites to qualify and scale manufacturing solutions.
  • Analyze volume manufacturing data using scripting and analytics tools to identify trends.
  • Perform root-cause analysis across silicon, PCB, and system layers for board failures.
  • Translate failure findings into concrete DFM and DFT improvements for design teams.
  • Brief leadership regularly on status, yield trends, and improvement roadmaps.

What we're looking for

  • 5+ years of experience in product engineering, product development, manufacturing, or validation of PCBs, silicon, or complex systems.
  • Hands-on depth in two or more areas including server architectures, PCB design, SMT, board-level validation, high-speed interfaces, or test automation.
  • Proven history of leading complex GPU or board-level projects to mass production on schedule with high quality and yield.
  • Ability to diagnose and resolve multi-disciplinary problems spanning silicon, board, firmware, and system layers.
  • Clear understanding of testing strategy economics regarding coverage, test-time, escape rate, yield, and cost.
  • Ability to communicate complex technical data clearly to both engineering and business audiences.
  • Bachelor’s degree in Electrical Engineering, Master's degree in Electrical Engineering, or equivalent experience.
  • Willingness to travel up to 15% both domestically and internationally.
  • Python or scripting experience applied to manufacturing analytics, test automation, or data pipelines (preferred).
  • Background coordinating cross-functional debug efforts across silicon, board, and systems (preferred).
  • Familiarity with HPC and hyperscale datacenter requirements (preferred).
  • Experience qualifying advanced memory solutions or high-speed SerDes interfaces (preferred).
  • Knowledge of PCBA manufacturing processes, mechanical tolerances, and system-level assembly constraints (preferred).

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