Senior Principal SOC Power Lead

Arm Holdings

Confirmed live yesterday High trust
Hybrid

Quick summary

Work type
Hybrid
Location
San Jose, CA
Salary
$323,000–$437,000 / yr
Posted
6 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $200k
This role $380k
$109k $472k
below market most similar roles pay here above market

This role pays more than 99% of similar roles. Most pay $167,843–$231,737 — the blue band above. At the midpoint, this role pays about $380k versus about $200k for comparable roles.

Based on 240 similar postings.

Employer

About Arm Holdings

Arm Holdings plc is a leading British semiconductor and software design firm, established in 1990 and recognized for developing energy-efficient processor architectures that power nearly all smartphones and a vast range of IoT and computing devices.

Arm Holdings currently has 113 open roles on FindRole.

Listed pay typically runs $208,450–$282,050 across 112 roles with salary data.

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View all roles at Arm Holdings

At a glance

TL;DR · Senior Principal SOC Power Lead

The Senior Principal SOC Power Lead joins the Power Attainment team to drive power analysis, modeling, and optimization for System-on-Chip solutions. This role involves leading a small team of power engineers to achieve best-in-class power efficiency through pre- and post-silicon power convergence. Key responsibilities include developing power models, defining workflows to improve accuracy and correlation to silicon, and managing project plans across architecture, design, and verification teams. The position requires expertise in RTL and Netlist based power analysis, EDA tools, and ASIC design dependencies like mixed Vt design and power domain partitioning. Candidates must possess verification experience with tools such as VCS, Questasim, and Palladium. Technical skills include Python for automation and knowledge of hardware low power features like clock and power gating.

What you'll do

  • Lead a team of power engineers to drive power analysis, modeling, and optimization for SoC solutions.
  • Manage pre- and post-silicon power convergence to achieve best-in-class power efficiency.
  • Develop accurate project plans and workflows to improve power analysis accuracy and turnaround time.
  • Perform RTL and Netlist based power analysis and sign-off flows using industry EDA tools.
  • Define SoC power budget decompositions and allocate power budgets to individual IPs.
  • Create workload scenarios for power verification in simulation and emulation environments.
  • Mentor junior engineers and provide technical leadership across multiple projects.
  • Present technical content regarding power performance and targets to internal and external stakeholders.

What we're looking for

  • Provide strong technical leadership to develop accurate project plans involving multiple teams.
  • Possess expertise in RTL and Netlist based power analysis, sign-off flows, and EDA tools.
  • Understand ASIC design dependencies including technology nodes, mixed Vt design, and power domain partitioning.
  • Have confirmed experience driving multiple projects and mentoring junior engineers.
  • Possess verification experience creating workload scenarios in simulation and emulation environments.
  • Demonstrate excellent presentation, interpersonal, and communication skills.
  • Appreciate software use-cases and how they interact with hardware low power features (preferred).
  • Proficiency in Python for automation and modeling (preferred).

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