below marketmost similar roles pay hereabove market
This role pays more than
90%
of similar roles. Most pay
$166,538–$216,250
— the blue band above.
At the midpoint, this role pays about
$253k
versus about
$191k
for comparable roles.
Based on 240 similar postings.
Employer
About Nvidia
Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing
Nvidia currently has
1623 open roles
on FindRole.
Listed pay typically runs
$184,000–$287,500
across 1110 roles with salary data.
The Senior Mixed Signal Design Engineer joins a diverse team building next generation NVLINK. This role involves developing and implementing high speed interfaces and analog circuits, taking innovative integrated circuit designs at data rates of 25Gbps and higher from concept through silicon characterization. Key responsibilities include defining circuit requirements, completing designs from schematic to layout and verification, and conducting schematic design of deep-submicron CMOS technologies. You will own architecture, transistor design, and verification using Cadence virtuoso, Spectre, Hspice, Finesim, and XA. You must provide floorplan guidance for high-speed routings and support post-silicon bring-up. Required skills include behavioral modeling, noise analysis, loop stability analysis, and monte-carlo simulations. This work addresses technical challenges in high-speed data transmission for consumer graphics, self-driving cars, and artificial intelligence.
Develop and implement high-speed interfaces and analog circuits for data rates of 25Gbps and higher.
Define circuit requirements and complete the full design cycle from schematic and layout to verification and characterization.
Conduct schematic designs of deep-submicron CMOS technologies using Spectre, Hspice, or similar tools.
Own the architecture, transistor design, and verification using industry-standard EDA tools like Cadence Virtuoso.
Optimize circuits to meet specific system performance requirements.
Provide detailed floorplans and guidance to layout engineers for matching and high-speed routings.
Provide technical support for post-silicon bring-up and debugging.
What we're looking for
Master's or PhD of Science in Electrical Engineering, Computer Engineering, or a related field with a strong analog design background (or equivalent experience).
11+ years of analog design experience in industry CMOS.
Experience in analog/mixed-signal circuit design using deep sub-micron processes, especially FINFET.
Experience with design and verification tools including Cadence's IC design environment and simulation tools like Spectre, HSpice, Finesim, and XA.
Experience in crafting test bench environments for component and top-level circuit verification.
Ability to perform behavioral modeling of analog and digital circuits.
Proficiency in analog simulation for noise analysis, loop stability analysis, ac/dc/tran analysis, and monte-carlo.
Strong interpersonal skills and the ability to work as a great teammate (preferred).