below marketmost similar roles pay hereabove market
This role pays more than
77%
of similar roles. Most pay
$166,538–$216,250
— the blue band above.
At the midpoint, this role pays about
$216k
versus about
$191k
for comparable roles.
Based on 240 similar postings.
Employer
About Nvidia
Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing
Nvidia currently has
1623 open roles
on FindRole.
Listed pay typically runs
$184,000–$287,500
across 1110 roles with salary data.
The Senior Mixed Signal Design Engineer joins the mixed-signal design team to build next generation NVLINK technology. This role involves developing and implementing high speed electrical and optical interfaces and analog circuits, specifically taking innovative integrated circuit designs at data rates of 25Gbps and higher from concept through silicon characterization. Key responsibilities include defining circuit requirements, performing schematic design, layout, verification, and post-silicon bring-up and debugging. The engineer will use deep-submicron CMOS technologies and industry standard EDA tools including Cadence Virtuoso, Spectre, Hspice, Finesim, and XA. Required skills include behavioral modeling, noise analysis, loop stability analysis, and monte-carlo simulations. The work focuses on optimizing circuit performance for high-speed data transmission across various product lines including consumer graphics and self-driving cars.
Develop and implement high-speed electrical and optical interfaces and analog circuits.
Manage integrated circuit designs from initial concept through silicon characterization at 25Gbps+ data rates.
Define circuit requirements and complete the full design cycle including schematic, layout, and verification.
Conduct schematic design of deep-submicron CMOS technologies using Spectre or Hspice.
Lead architecture, transistor design, and verification using industry-standard EDA tools like Cadence Virtuoso.
Optimize circuits to meet specific system performance requirements.
Provide detailed floorplans and guidance for matching and high-speed routings to layout engineers.
Provide technical support for post-silicon bring-up and debugging.
What we're looking for
Master of Science or Ph.D. in Electrical Engineering, Computer Engineering, or a related field with a strong analog design background (or equivalent experience).
6+ years of analog design experience.
Experience in CMOS Analog / Mixed Signal Circuit Design in deep sub-micron processes, especially in FINFET.
Experience with design and verification tools including Cadence's IC design environment and simulation tools like Spectre, HSpice, Finesim, and XA.
Experience in crafting test bench environments for component and top-level circuit verification.
Ability to perform behavioral modeling of analog and digital circuits.
Proficiency in analog simulation for noise analysis, loop stability analysis, ac/dc/tran analysis, and monte-carlo.
Strong interpersonal skills and the ability to work as a phenomenal teammate (preferred).