Senior Circuit Design Engineer

Nvidia

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Quick summary

Work type: On-site
Location: Santa Clara, CA
Employment: Full-time
Posted: 103 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

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Similar $184k

$134k $228k

below market most similar roles pay here above market

This listing doesn't post a salary. Most similar roles pay $152,265–$216,250.

Based on 240 similar postings.

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About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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At a glance

TL;DR · Senior Circuit Design Engineer

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The Senior Circuit Design Engineer joins the team focused on standard cell characterization for cutting-edge processor design in deep submicron technologies. In this role, you will drive transistor level circuit design, modeling, and performance analysis processes while supporting the development of tools using Perl and Python. You will develop new simulations to perform timing, power, noise, and OCV evaluations, and collaborate with cross-functional teams to improve library quality checks. The position requires a deep understanding of standard cell library design, verification, and characterization, specifically regarding Liberty models and their application to digital implementation and signoff flows. You must have hands-on experience running SPICE simulations and proficiency in scripting languages like Tcl and Make to solve complex hardware design problems.

Skills

Circuit Design Standard Cell Characterization SPICE Python Perl Tcl Make Liberty Models OCV Digital Implementation Signoff Flows Automation Deep Submicron Process

What you'll do

Design and characterize standard cell libraries using deep submicron technologies.
Drive transistor-level circuit design, modeling, and performance analysis processes.
Develop and support internal tools using Perl and Python.
Create new simulations to perform timing, power, noise, and OCV evaluations.
Improve quality checks and resolve issues related to library work.
Generate Liberty models for use in digital implementation and signoff flows.
Run SPICE simulations and adapt to new simulation tools as needed.

What we're looking for

MS in Electrical or Computer Engineering or equivalent experience.
4+ years of experience (preferred).
Strong background in deep submicron process issues.
Deep understanding of the design, verification, and characterization of standard cell libraries.
Deep understanding of generating timing, power, noise, and OCV views for standard cells.
Familiarity with Liberty models and their application to digital implementation and signoff flows.
Hands-on experience running SPICE simulations and the ability to adapt to new simulation tools.
Strong proficiency in scripting languages such as Perl, Tcl, and Make (preferred).

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