Analog & RF IC Senior Layout Engineer
Broadcom
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How this pay compares to similar roles
This role pays more than 55% of similar roles. Most pay $167,812–$216,562 — the blue band above. At the midpoint, this role pays about $196k versus about $192k for comparable roles.
Based on 240 similar postings.
Employer
AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors
Amd currently has 496 open roles on FindRole.
Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.
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At a glance
The Senior IC Layout design Engineer joins the SerDes Technology Group to develop high-performance, multi-protocol wireline transceivers in state-of-the-art CMOS processes. This role involves the layout design of high-speed analog mixed-signal circuits, including block-level physical implementation, floor-planning, power distribution networks, and clock and signal routing. The engineer will participate in post-layout performance analysis, chip-level integration, and defining layout methodologies while supervising layout resources and driving productivity improvements like pcell development. Key technical requirements include experience with 7nm or lower process nodes, understanding of IR, EM, and RC delay, and proficiency in physical design verifications such as LVS, DRC, and ERC. Candidates should be familiar with high-speed SerDes blocks, PLLs, and tools like Cadence SKILL, Perl, Python, or Tcl.
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