Senior Analog & RF IC Layout Engineer

Broadcom

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Irvine, CASan Diego, CA
Salary
$109,700–$175,500 / yr
Employment
Full-time
Posted
93 days ago
Freshness
Confirmed live yesterday
Closes
Dec 15, 2026

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $199k
This role $143k
$95k most similar roles pay here $244k

This role pays less than 94% of similar roles. Most pay $170,000–$227,500 — the shaded band above. At the midpoint, this role pays about $143k versus about $199k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 135 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 95 roles with salary data.

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View all roles at Broadcom

At a glance

TL;DR · Senior Analog & RF IC Layout Engineer

As an Analog & RF IC Senior Layout Engineer, you will join a team focused on developing high-tech hardware and advanced silicon. You will be responsible for translating complex circuit schematics into DRC/LVS-clean layouts for critical IP blocks while collaborating with senior designers on floorplanning, power and ground architecture, and precision device matching. Your daily work involves managing the full cycle of custom top-level and IP blocks from initial layout to final tape-out and sign-off. You will utilize the Cadence Virtuoso tool suite, including Virtuoso VXL and Mentor Calibre verification tools. The role requires expertise in high-speed custom analog and digital circuits such as TX, RX, SerDes, and PLLs. You will solve complex physics and parasitic challenges on advanced FinFET technology nodes to support wireless, wireline, and AI hardware products.

What you'll do

  • Translate complex circuit schematics into DRC/LVS-clean physical layouts for critical IP blocks.
  • Design floorplans, power/ground architectures, and precision device matching for high-frequency environments.
  • Utilize Cadence Virtuoso and Mentor Calibre tools to design and verify high-speed custom circuits.
  • Execute full-cycle layout ownership from initial floorplanning through final tape-out and sign-off.
  • Route critical nets and match devices to ensure peak performance in high-frequency applications.
  • Navigate layout nuances on advanced FinFET technology nodes to manage parasitic challenges.
  • Perform technical problem-solving to overcome complex circuit layout challenges at the nanometer scale.

What we're looking for

  • Extensive experience with the layout of high-speed custom analog and digital circuits such as TX, RX, SerDes, and PLLs.
  • Proven design and layout experience in advanced FinFET nodes.
  • Deep familiarity with the Cadence Virtuoso tool suite, including Virtuoso VXL and Mentor Calibre verification.
  • A BS degree in Electrical Engineering (or a related field) with 8+ years of related experience (preferred).
  • An MS degree in Electrical Engineering (or a related field) with 6+ years of related experience (preferred).

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