Emulation Engineer

Broadcom

Confirmed live today High trust

Quick summary

Work type: On-site
Location: San Jose, CA
Employment: Full-time
Posted: 35 days ago
Freshness: Confirmed live today
Closes: Mar 18, 2027
Nearby: 99+ roles within 25 mi

Market check

Salary context

How this pay compares to similar roles

Similar $186k

$138k $233k

below market most similar roles pay here above market

This listing doesn't post a salary. Most similar roles pay $153,687–$219,237.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 280 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 169 roles with salary data.

Most-posted roles

View all roles at Broadcom

At a glance

TL;DR · Emulation Engineer

Role Posting Log in to save

The Emulation Engineer joins the Core Switch Group to support the development of networking ASICs. This role involves conducting detailed studies of chip architecture and micro-architecture to define and execute pre-silicon test plans. You will verify designs using emulation platforms, develop sub-system and chip-level tests, and contribute to building synthesizable models. Key responsibilities include performing root cause analysis for hardware and software issues, writing automation scripts, and maintaining robust emulation environments. The position requires proficiency in Verilog, SystemVerilog, C/C++, Tcl, and Python. Candidates should have experience or exposure to Zebu and Palladium platforms, IXIA and Spirent traffic generators, and high-speed protocols like PCIe and Ethernet. You will collaborate with architecture, design, and software teams to ensure comprehensive verification coverage for networking switch chips.

Skills

Verilog SystemVerilog Python C/C++ Tcl Emulation Zebu Palladium Pre-silicon Verification ASIC Ethernet PCIe IXIA Spirent Coverage-driven Verification DPI Scripting

What you'll do

Conduct detailed studies of chip architecture to define and execute pre-silicon test plans.
Verify design, architecture, and micro-architecture using emulation platforms.
Develop sub-system and chip-level tests using Tcl, ITcl, Python, and C/C++.
Build and synthesize Verilog/SystemVerilog-based models for Zebu or Palladium platforms.
Perform block, sub-system, and chip-level debugging and root cause analysis for hardware and software issues.
Write and maintain automation scripts and emulation methodologies to improve efficiency and coverage.
Create reusable synthesizable design blocks, libraries, and verification components for emulation processes.
Maintain robust emulation environments for a global user community.

What we're looking for

Bachelor’s degree with 0-2 years of experience in pre-silicon verification, emulation, or simulation of ASICs.
Foundational knowledge or hands-on academic/internship experience in Verilog/SystemVerilog, C/C++, Tcl, and Python.
Experience with scripting for automation.
Exposure to or a strong willingness to learn about emulation platforms like Zebu or Palladium.
Exposure to or a strong willingness to learn about traffic generators like IXIA or Spirent.
Exposure to or a strong willingness to learn about high-speed interface protocols such as PCIe and Ethernet.
Developing debugging skills and a basic understanding of DPI transactors, assertions, and coverage-driven verification.
Strong teamwork and communication skills to collaborate with architects, designers, and software engineers.

Similar roles

Emulation Engineer

Cisco

San Jose, CA 62 days ago $155,000–$222,600

C/C++ TCL Python System Verilog UVM OpenStack Docker Open vSwitch Palladium Veloce Zebu gdb RTL PCIe I2C Ethernet

5+ yrs exp

Save

Emulation Engineer

Apple Inc

Cupertino, CA 40 days ago $150,400–$277,600

SystemVerilog Verilog C++ C UVM VHDL Python Perl TCL Makefile Palladium Veloce Zebu PCIe USB Power Estimation DPI Transactors

3+ yrs exp

Save

Principal Emulation Engineer

Samsung Semiconductor

San Jose, CA 69 days ago $219,000–$351,000

FPGA Prototyping Hardware Emulation Verilog SystemVerilog Python Tcl Perl Cadence Palladium Synopsys ZeBu Siemens Veloce Synopsys HAPS Cadence Protium SCE-MI PCIe DDR HBM AXI CHI Ethernet AI/ML SoC Bring-up Pre-silicon Verification Waveform Capture

10+ yrs exp

Save

Emulation Verification Engineer

Apple Inc

Beaverton, OR 40 days ago

SystemVerilog Verilog UVM Palladium Veloce Zebu FPGA Xilinx Altera Python Perl TCL C/C++ DPI RTL SystemVerilog Assertions Low Power Testing Emulation Design Verification

3+ yrs exp

Save

Emulation Verification Engineer

Apple Inc

San Francisco, CA 74 days ago $129,300–$225,300

SystemVerilog Verilog UVM Palladium Veloce Zebu Python Perl TCL C++ FPGA Xilinx Altera UPF RTL Mixed Signal Models Design Verification Silicon Validation

Save

Emulation Verification Engineer

Apple Inc

San Diego, CA 74 days ago $175,000–$308,500

SystemVerilog Verilog UVM Palladium Veloce Zebu Python Perl TCL C/C++ DPI FPGA Xilinx Altera UPF Regression Management RTL to Emulation Mixed Signal Models

10+ yrs exp

Save