Senior ASICS Packaging Engineer

Qualcomm

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$129,165–$190,800 / yr
Posted
30 days ago
Freshness
Confirmed live yesterday
Closes
Feb 8, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $177k
This role $160k
$119k most similar roles pay here $223k

This role pays less than 70% of similar roles. Most pay $147,250–$206,450 — the shaded band above. At the midpoint, this role pays about $160k versus about $177k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

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View all roles at Qualcomm

At a glance

TL;DR · Senior ASICS Packaging Engineer

The Senior ASICS Packaging Engineer joins the Packaging Engineering team to independently manage new product development risk analysis, characterization, and mitigation for electronic packages. This individual works with internal design teams and external suppliers to ensure manufacturing readiness for volume production. Key responsibilities include defining product design rules, executing manufacturing process setups, and performing technical risk assessments based on empirical evaluations of IC package manufacturability and reliability. The role involves leading cross-functional coordination, authoring technical reports regarding supplier support, and managing customer new product bring-up and issue resolution. The position requires a Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. The core work focuses on solving complex manufacturing challenges for integrated circuit packages while ensuring that products meet specific reliability standards during the transition from development to high-volume production environments.

What you'll do

  • Perform risk analysis, characterization, and mitigation for new electronic packages.
  • Define product design rules based on technical risk assessments and empirical evaluations.
  • Execute manufacturing process setup and mitigate risks to ensure volume production readiness.
  • Author reports and documentation regarding supplier support and internal development risks.
  • Manage customer new product bring-up, enablement, and issue resolution.
  • Participate in design reviews and project meetings as a key contributor.

What we're looking for

  • A Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field is accepted.
  • Experience performing risk analysis, characterization, and mitigation of electronic packages for new product development.
  • Ability to define product design rules and execute manufacturing process setup based on technical risk assessment.
  • Experience conducting empirical evaluation of IC package manufacturability and reliability.
  • Ability to lead cross-functional coordination and risk assessment for new products.
  • Ability to author reports, presentations, and documentation regarding supplier support and development risks.
  • Experience in customer new product bring-up, enablement, and issue management/resolution.

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