Senior ASIC Verification Engineer

Nvidia

Confirmed live today Trusted
Hybrid

Quick summary

Work type
Hybrid
Location
Austin, TXSanta Clara, CA
Salary
$136,000–$218,500 / yr
Employment
Full-time
Posted
48 days ago
Freshness
Confirmed live today

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Competitive pay

How this pay compares to similar roles

Similar $192k
This role $177k
$125k $236k
below market most similar roles pay here above market

This role pays less than 55% of similar roles. Most pay $168,500–$216,250 — the blue band above. At the midpoint, this role pays about $177k versus about $192k for comparable roles.

Based on 240 similar postings.

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About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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At a glance

TL;DR · Senior ASIC Verification Engineer

The Senior ASIC Verification Engineer joins the GPU ASIC team to verify the design, architecture, and micro-architecture of leading SoCs and GPUs. The role involves defining verification scope, developing verification infrastructure for memory subsystem units, and verifying firmware code with a focus on hardware and firmware interactions. Key responsibilities include collaborating with architects, designers, and software engineers to ensure high-performance silicon. Candidates must possess experience in verification methodologies, creating reusable components, and using random stimulus, functional coverage, and assertion-based verification. Required technical skills include fluency in Object Oriented Programming with SystemVerilog and exposure to UVM, VCS, Debussy, and GDB. The work addresses technical challenges in high-speed IO protocols, memory coherence, and RISC-V architecture within the context of consumer graphics, self-driving cars, and artificial intelligence.

What you'll do

  • Verify the design, architecture, and micro-architecture of SoCs and GPUs.
  • Define the verification scope for complex hardware designs.
  • Develop verification infrastructure for memory subsystem units.
  • Verify firmware code and hardware/firmware interactions.
  • Create reusable verification components using UVM and SystemVerilog.
  • Utilize random stimulus, functional coverage, and assertion-based verification methodologies.
  • Debug embedded firmware code using tools like VCS, Debussy, and GDB.
  • Write comprehensive verification plans for high-speed IO protocols and memory coherence.

What we're looking for

  • Bachelor's or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field (or equivalent experience).
  • 5+ years of experience in verification methodology and creating reusable verification components.
  • Knowledge of verification using random stimulus, functional coverage, and assertion-based verification methodologies.
  • Fluency in Object Oriented Programming with SystemVerilog.
  • Exposure to design and verification tools like VCS, Debussy, and GDB, and methodologies like UVM.
  • Strong communication skills and a passion for debugging and problem-solving.
  • Prior verification experience related to high-speed IO protocols or memory coherence (preferred).
  • Experience debugging embedded firmware code in C or RISC-V Assembly (preferred).

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