Senior ASIC Verification Engineer

Nvidia

Confirmed live yesterday High trust

Hybrid

Quick summary

Work type: Hybrid
Location: Austin, TXSanta Clara, CA
Salary: $136,000–$218,500 / yr
Posted: 2 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $192k

This role $177k

$126k most similar roles pay here $230k

This role pays less than 53% of similar roles. Most pay $168,500–$216,062 — the shaded band above. At the midpoint, this role pays about $177k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 896 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.

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At a glance

TL;DR · Senior ASIC Verification Engineer

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As a Senior ASIC Verification Engineer on the GPU ASIC team, you will verify the design, architecture, and micro-architecture of leading SoCs and GPUs. Your daily responsibilities include defining verification scopes, developing infrastructure for memory subsystem units, and verifying firmware code with a specific focus on hardware and firmware interactions. You will collaborate with architects, designers, and software engineers to solve complex technical challenges. The role requires expertise in SystemVerilog, Object Oriented Programming, and UVM methodologies. You will utilize tools such as VCS, Debussy, and GDB while applying random stimulus, functional coverage, and assertion-based verification techniques. Preferred experience includes high speed IO protocols, memory coherence, RISC-V architecture, and debugging embedded firmware code in C or RISC-V Assembly to ensure the reliability of high performance, low power silicon components.

Skills

SystemVerilog UVM VCS GDB RISCV C Assertion-based Verification Functional Coverage Random Stimulus Firmware ASIC Verification Memory Subsystem High Speed IO Object Oriented Programming

What you'll do

Verify the design, architecture, and micro-architecture of high-performance SoCs and GPUs.
Define verification scopes for complex hardware components.
Develop verification infrastructure specifically for memory subsystem units.
Verify firmware code with a focus on hardware and firmware interactions.
Create reusable verification components using SystemVerilog and UVM methodologies.
Implement random stimulus, functional coverage, and assertion-based verification techniques.
Debug embedded firmware code written in C or RISC-V Assembly.
Develop comprehensive verification plans for complex silicon designs.

What we're looking for

Bachelor's or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field.
5+ years of experience in verification methodology and creating reusable components.
Proficiency in Object Oriented Programming with SystemVerilog.
Knowledge of random stimulus, functional coverage, and assertion-based verification methodologies.
Experience with UVM or equivalent verification methodologies and tools like VCS or GDB.
Strong problem-solving skills and a passion for debugging.
Excellent communication skills to collaborate across different teams and sites.
Preferred experience in high-speed IO protocols, memory coherence, or RISC-V architecture.

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