ASIC Verification Engineer

Nvidia

Hybrid

Quick summary

Work type: Hybrid
Location: Santa Clara, CA
Salary: $116,000–$189,750 / yr
Posted: 37 days ago

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $187k

This role $153k

$104k most similar roles pay here $231k

This role pays less than 78% of similar roles. Most pay $159,525–$214,600 — the shaded band above. At the midpoint, this role pays about $153k versus about $187k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 563 open roles on FindRole.

Listed pay typically runs $168,000–$264,500 across 556 roles with salary data.

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At a glance

TL;DR · ASIC Verification Engineer

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NVIDIA is hiring an ASIC Verification Engineer to join its cutting-edge team responsible for verifying the design and implementation of leading SoC's and GPU's. In this role, you will define verification scope, develop infrastructure for memory subsystem units, and collaborate with architects and designers across sites to ensure high-quality designs. The ideal candidate has a Bachelors or Masters Degree in Electrical Engineering, Computer Science, or equivalent experience, along with 2+ years of relevant work or research background. You should be proficient in Object-Oriented Programming using C++ and SystemVerilog, familiar with verification tools like VCS and debug tools such as Debussy, and possess strong problem-solving skills. Experience with high-speed IO protocols and memory coherence is a significant advantage.

Skills

C++ SystemVerilog UVM VCS Debussy GDB Python CI/CD ASIC SoC GPU Verification methodology Random stimulus Functional coverage Assertion-based verification

What you'll do

Define the verification scope for complex SoC and GPU designs.
Develop verification infrastructure for memory subsystem units.
Create reusable verification components using advanced methodologies.
Utilize random stimulus, functional coverage, and assertion-based verification.
Write efficient testbenches in C++ or SystemVerilog for design validation.
Collaborate with architects and designers to ensure comprehensive coverage.

What we're looking for

Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or equivalent.
2+ years of relevant work or research experience in ASIC verification.
Strong background in verification methodologies and creating reusable components.
Proficiency in C++ and/or SystemVerilog for object-oriented programming.
Experience with design and verification tools like VCS, Debussy, GDB, and UVM.
Excellent debugging skills and problem-solving abilities.

Hybrid

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