Senior ASIC Verification Engineer

Nvidia

Confirmed live yesterday Trusted

Hybrid

Quick summary

Work type: Hybrid
Location: Durham, NC
Salary: $136,000–$218,500 / yr
Posted: 39 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $192k

This role $177k

$126k most similar roles pay here $230k

This role pays less than 53% of similar roles. Most pay $168,500–$216,062 — the shaded band above. At the midpoint, this role pays about $177k versus about $192k for comparable roles.

Based on 240 similar postings.

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About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 896 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.

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At a glance

TL;DR · Senior ASIC Verification Engineer

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As a Senior ASIC Verification Engineer on the GPU ASIC team, you will verify the design, architecture, and micro-architecture of leading SoCs and GPUs. Your daily responsibilities include defining verification scope and contributing to the development of verification infrastructure for memory subsystem units while collaborating with architects, designers, and software engineers across multiple sites. You will utilize advanced verification methodologies including random stimulus, functional coverage, and assertion-based verification. The role requires proficiency in Object Oriented Programming with C++ and SystemVerilog, alongside experience with UVM or equivalent methodologies. You will also use tools such as VCS, Debussy, and GDB to debug complex issues. Relevant domain expertise includes high speed IO protocols and memory coherence. This position focuses on solving technical challenges related to the design of high-performance, low-power silicon for computing platforms.

Skills

SystemVerilog C++ UVM VCS GDB Debussy Assertion-based Verification Random Stimulus Functional Coverage ASIC Verification SoC Memory Subsystem High Speed IO Protocols Memory Coherence Object Oriented Programming

What you'll do

Verify the design, architecture, and micro-architecture of leading SoCs and GPUs.
Define the verification scope for complex hardware components.
Develop verification infrastructure specifically for memory subsystem units.
Create reusable verification components using advanced methodologies.
Implement verification using random stimulus, functional coverage, and assertion-based methods.
Utilize SystemVerilog and C++ to develop and execute verification plans.
Debug complex hardware issues using tools like VCS, Debussy, or GDB.
Verify high-speed IO protocols and memory coherence features.

What we're looking for

Bachelor's or Master's Degree in Electrical Engineering, Computer Science, Computer Engineering, or equivalent experience.
5+ years of relevant work or research experience.
Strong history of working on verification methodology and creating reusable verification components.
Knowledge of random stimulus, functional coverage, and assertion-based verification methodologies.
Fluency in Object Oriented Programming with C++ and/or SystemVerilog.
Experience with design and verification tools such as VCS or equivalent simulation and debug tools.
Proficiency in UVM or equivalent verification methodologies.
Prior experience with high speed IO protocols or memory coherence is preferred.

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