RFIC Layout Engineer

What you'll do

• Perform detailed transistor-level layout of RF and analog circuit blocks including LNAs, mixers, PLLs, and power amplifiers.
• Execute block-level layout through full verification flows including extraction, DRC, LVS, and DFM checking.
• Collaborate with designers to perform floorplanning for various circuit blocks.
• Conduct layout reviews for power/ground routing and electromigration issues.
• Perform signal path checks, differential and IQ matching, and signal coupling analysis.
• Implement layout techniques for device matching, minimizing parasitics, RF shielding, and high-frequency routing.
• Manage advanced process effects such as LOD, WPE, guard rings, and PN junctions in FinFET technology.

What we're looking for

• Minimum of 5 years of related experience required.
• Experience in custom RF/analog layout for radio transceivers with extensive knowledge of deep sub-micron CMOS.
• High level proficiency in interpretation of CALIBRE DRC, ERC, and LVS in FinFET Technology.
• Knowledge of Cadence layout tools.
• Knowledge of layout techniques for device matching, minimizing parasitics, RF shielding, and high frequency routing (preferred).
• Solid understanding of RC delay, electromigration, and coupling (preferred).
• Understanding of guard rings, DNW, PN junctions, and advanced process effects such as LOD and WPE (preferred).
• Scripting skills in PERL or SKILL (preferred).