RFIC Layout Engineer

Apple Inc

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Quick summary

Work type: On-site
Location: San Diego, CA
Salary: $118,019–$207,100 / yr
Posted: 15 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $201k

This role $163k

$104k most similar roles pay here $253k

This role pays less than 78% of similar roles. Most pay $168,425–$233,050 — the shaded band above. At the midpoint, this role pays about $163k versus about $201k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3513 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2730 roles with salary data.

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At a glance

TL;DR · RFIC Layout Engineer

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As an RFIC Layout Engineer, you will join the Wireless SoC Radio Team to design and bring next-generation wireless technologies into high-volume production using advanced CMOS technology nodes. You will perform detailed transistor-level layout for various RF and analog circuit blocks, including LNAs, mixers, PLLs, modulators, power amplifiers, and data converters. Your daily responsibilities involve block level layout through full verification flows involving extraction, DRC, LVS, and DFM checking, alongside collaborating with designers on floorplanning and reviewing layouts for electromigration and signal coupling. The role requires experience in FinFet technology and deep sub-micron CMOS. You will utilize CADENCE layout tools and may use PERL or SKILL scripting. Technical expertise includes device matching, RF shielding, high frequency routing, and understanding advanced process effects like LOD and WPE.

Skills

RFIC Layout CMOS FinFET LNA Mixer PLL ADC DAC DRC LVS ERC DFM Cadence Perl SKILL RC Delay Electromigration high frequency routing

What you'll do

Perform transistor-level layout of RF and analog circuit blocks including LNAs, mixers, PLLs, and power amplifiers.
Execute block-level layouts through full verification flows including extraction, DRC, LVS, and DFM checking.
Collaborate with designers to perform floorplanning for various circuit blocks.
Conduct layout reviews for power/ground routing and electromigration issues.
Perform signal path checks to ensure proper differential and IQ matching.
Implement layout techniques to minimize parasitics and provide RF shielding.
Manage high-frequency routing while accounting for RC delay and signal coupling.

What we're looking for

Minimum requirement of a bachelor's degree.
Experience with FinFET technology.
Experience in custom RF/analog layout for radio transceivers with knowledge of deep sub-micron CMOS (preferred).
Knowledge of layout techniques for device matching, minimizing parasitics, RF shielding, and high frequency routing (preferred).
Solid understanding of RC delay, electromigration, and coupling (preferred).
Understanding of guard rings, DNW, PN junctions, and advanced process effects like LOD and WPE (preferred).
High level proficiency in interpretation of CALIBRE DRC, ERC, and LVS in FinFet Technology (preferred).
Knowledge of CADENCE layout tools and scripting skills in PERL or SKILL (preferred).

RFIC Layout Engineer

Apple Inc

San Diego, CA 20 days ago $118,019–$207,100

RF Layout Analog Layout FinFET CMOS Cadence Calibre DRC LVS ERC DFM Perl SKILL Floorplanning Electromigration RC Delay High-Frequency Routing

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