Interconnect Performance Engineer

Amd

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Austin, TX
Salary
$144,800–$217,200 / yr
Posted
54 days ago
Freshness
Confirmed live yesterday
Closes
Sep 2, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $203k
This role $181k
$133k $253k
below market most similar roles pay here above market

This role pays less than 63% of similar roles. Most pay $173,781–$233,050 — the blue band above. At the midpoint, this role pays about $181k versus about $203k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

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View all roles at Amd

At a glance

TL;DR · Interconnect Performance Engineer

The Interconnect Performance Engineer joins the Infinity Fabric Architecture and Performance team to define and deliver next-generation Fabric Interconnects. This role provides low latency and high efficiency connectivity to the memory system across Data Center, Gaming, Client, and Semi-Custom product lines. The engineer performs RTL performance analysis and verification, executes performance verification plans at the IP level, and supports SoC-level performance debug using simulation and emulation environments. Key responsibilities include conducting theoretical analysis of memory system optimizations, developing benchmarks, and debugging performance failures to identify design bottlenecks. Required skills include expertise in Verilog, SystemVerilog, C, C++, and scripting languages like Python or Perl. The role requires deep knowledge of memory system architecture, interconnect design, multiprocessor coherency, and cache architectures.

What you'll do

  • Perform RTL performance analysis and verification for the Infinity Fabric Interconnect.
  • Execute performance verification plans at the IP level using simulation and emulation environments.
  • Conduct theoretical analysis of memory system optimizations and analyze performance benchmarks.
  • Debug performance failures and identify design bottlenecks to propose architectural or RTL solutions.
  • Develop and enhance debug infrastructure, tooling, and visualization solutions for performance analysis.
  • Leverage AI-based tools and automation to improve engineering productivity and performance workflows.
  • Provide technical leadership on high-performance SoC memory system designs with architecture and design teams.

What we're looking for

  • BS, MS, or PhD degree in Electrical or Computer Engineering.
  • Advanced degree in Electrical or Computer Engineering (preferred).
  • Proven experience in RTL performance analysis and debug using hardware simulation/emulation platforms (preferred).
  • Hands-on experience with simulation testbench bring-up, configuration, and development of new performance test cases (preferred).
  • Strong system-level performance debug experience across complex IP interactions, including CPU, GPU, and I/O workloads (preferred).
  • Deep understanding of memory system architecture and interconnect design (preferred).
  • Excellent knowledge of Verilog and SystemVerilog (preferred).
  • Working knowledge of C, C++, and a scripting language such as Python or Perl (preferred).

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