below marketmost similar roles pay hereabove market
This role pays less than
51%
of similar roles. Most pay
$168,425–$241,750
— the blue band above.
At the midpoint, this role pays about
$208k
versus about
$205k
for comparable roles.
Based on 240 similar postings.
Employer
About Amd
AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors
Amd currently has
496 open roles
on FindRole.
Listed pay typically runs
$172,000–$258,000
across 496 roles with salary data.
The Power Methodology and Modelling Engineer will drive SoC power efficiency methodology with a primary focus on RTL and architecture. Working within a collaborative team, the engineer will support the development of IP and SoC power models while analyzing power-performance tradeoffs to improve efficiency across products. Daily responsibilities include contributing to RTL power analysis, evaluating simulation and emulation traces for power projection, and identifying key power contributors to drive RTL optimizations. The role requires a strong foundation in RTL design, digital logic, and SoC architecture, specifically regarding CPU, memory subsystems, fabrics, and power-management features. Candidates should possess skills in power modeling, model-based power analysis, and low-power design techniques. Proficiency in programming and scripting, specifically using Python, is preferred for these technical tasks.
Contribute to SoC power methodology, RTL power analysis, and optimization to improve overall power efficiency.
Analyze power and performance tradeoffs using power models, RTL simulations, workloads, and design data.
Evaluate simulation and emulation traces for power projection and correlate results with power-model predictions.
Support the development and continuous improvement of SoC power models and methodologies.
Identify key power contributors and anomalies to drive RTL power optimizations with design teams.
Drive power-efficiency ideas from initial concept through RTL implementation and validation.
Apply power methodology and analysis techniques to implement RTL and SoC-level power-efficiency enhancements.
What we're looking for
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
Strong foundation in RTL design, digital logic, and SoC architecture (preferred).
Experience with RTL power analysis, low-power design techniques, and power-efficiency optimization (preferred).
Understanding of power-management concepts and how architecture and RTL design decisions impact SoC power and performance (preferred).
Exposure to power modeling, power projection, and model-based power analysis methodologies (preferred).
Experience with hardware emulation and the use of emulation traces for power projection and analysis (preferred).
Programming and scripting experience, with Python preferred (preferred).
Strong analytical and problem-solving skills with the ability to identify and drive power-efficiency opportunities across engineering disciplines (preferred).
Power Analysis
Power Modeling
Power Optimization
ASIC
SoC
RTL
AI
ML
Silicon Validation
Physical Design
Architecture
Workload-driven Analysis
Automation
Semiconductor Design