CPU Power Management Microarchitect/RTL Engineer

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $184,700–$324,800 / yr
Posted: 15 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $214k

This role $255k

$142k most similar roles pay here $344k

This role pays more than 85% of similar roles. Most pay $177,287–$250,000 — the shaded band above. At the midpoint, this role pays about $255k versus about $214k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 2925 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2305 roles with salary data.

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At a glance

TL;DR · CPU Power Management Microarchitect/RTL Engineer

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The CPU Power Management Microarchitect/RTL Engineer joins the Silicon Engineering Group to develop high-performance, low-power microprocessors. This role involves owning and participating in micro-architecture development and specification, ranging from early exploration to detailed technical specifications. The engineer will be responsible for RTL ownership, including design refinement to meet power, performance, area, and timing goals, while supporting verification through test bench development and formal methods. Key responsibilities include performance exploration, correlation, and physical design implementation. Candidates must possess experience in microprocessor architecture, logic design principles, Verilog or VHDL, and waveform debugging. Preferred skills include expertise in dynamic voltage and frequency scaling, thermal management, and power state definition, alongside proficiency in C, C++, Perl, or Python. The role focuses on solving complex power integrity, clocking solutions, and energy management challenges within CPU microarchitecture.

Skills

RTL Verilog VHDL Microarchitecture DVFS DVFM C C++ Python Perl Simulation Emulation Power Management Logic Design

What you'll do

Develop micro-architecture specifications from high-level exploration through detailed research and documentation.
Own the development, assessment, and refinement of RTL designs to meet power, performance, area, and timing goals.
Support verification teams with test bench development, formal methods, and simulation or emulation for functional verification.
Explore high-performance strategies and correlate results with performance verification teams to ensure design targets are met.
Implement and verify physical design aspects including timing, area, reliability, testability, and power.
Design and implement advanced thermal, energy management, and dynamic voltage/frequency scaling solutions.
Develop micro-architecture strategies for improved power integrity and Di/dt mitigation.

What we're looking for

Minimum BS degree and 10+ years of relevant industry experience.
Experience with microprocessor architecture.
Experience with logic design principles involving timing and power implications.
Experience in Verilog or VHDL.
Experience with simulators and the waveform debugging process.
Expertise in advanced power management, thermal/energy management, or clocking solutions (preferred).
Understanding of low power and high-performance microarchitecture techniques (preferred).
Experience in C, C++, Perl, or Python (preferred).

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