Power Management Systems Design and Verification Engineer
Qualcomm
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How this pay compares to similar roles
This role pays less than 98% of similar roles. Most pay $168,500–$227,350 — the shaded band above. At the midpoint, this role pays about $124k versus about $198k for comparable roles.
Based on 240 similar postings.
Employer
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has 615 open roles on FindRole.
Listed pay typically runs $155,400–$232,600 across 593 roles with salary data.
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At a glance
The Power Management Systems Design and Verification Engineer joins the PMIC Systems team to research, specify, design, develop, integrate, and verify power management hardware and software solutions at the chipset and feature levels. This role involves developing test platform hardware and software, performing post-silicon verification, triaging system-level problems to determine root causes, and documenting component functionality for a PMIC. The engineer will utilize tools such as MATLAB, Excel, and Mentor Graphics while applying expertise in power electronics, thermal analysis, and firmware coding. Required skills include proficiency in Python or similar scripting languages, PCB layout, and knowledge of SMPS, LDO, Buck Converters, Boost Converters, battery charging, and USB interfaces. The work focuses on solving complex power management challenges to ensure system-level performance and power metrics meet specific chipset requirements and industry standards.
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