Power Management Systems Engineer

Amd

Confirmed live today High trust

Quick summary

Work type
On-site
Location
Austin, TX
Salary
$117,200–$175,800 / yr
Posted
67 days ago
Freshness
Confirmed live today
Closes
Aug 20, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $195k
This role $146k
$104k $243k
below market most similar roles pay here above market

This role pays less than 85% of similar roles. Most pay $161,066–$229,100 — the blue band above. At the midpoint, this role pays about $146k versus about $195k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

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View all roles at Amd

At a glance

TL;DR · Power Management Systems Engineer

The Power Management Systems Engineer joins the Client and Graphics Business Unit to focus on post silicon CPU/APU power management feature development solutions. This role involves driving the feature enablement, validation, and debug of Windows Modern Standby (S0ix) system features on cutting edge mobile and desktop processors. Key responsibilities include leading enablement strategies from pre-silicon through customer adoption, driving post silicon lab validation, and resolving power management issues across silicon, firmware, and BIOS teams. The engineer will also develop power management process improvements and mentor junior staff. Required expertise includes Windows Modern Standby (S0i3) system operation, SOC power management, system architecture, and technical debug. Candidates should possess a Bachelor’s or Master’s degree in Computer Science or a related field to solve complex hardware and software interaction problems.

What you'll do

  • Lead S0i3 power management enablement and validation strategies from pre-silicon through customer adoption.
  • Drive S0i3 feature enablement and validation within post-silicon lab environments.
  • Debug and resolve S0i3 system power management issues across silicon, firmware, and BIOS.
  • Develop technical test plans to improve power management process quality and efficiency.
  • Coordinate with architecture, silicon design, firmware, and validation teams to deliver production solutions.
  • Coach and mentor junior engineering staff.

What we're looking for

  • Deep understanding of S0ix system power management spanning silicon hardware, platform design, and firmware/software interactions.
  • Experience with post-silicon CPU/APU power management feature development solutions.
  • Ability to lead power management enablement and validation strategies from pre-silicon through customer adoption.
  • Ability to drive debug and resolution of system power management issues across silicon, firmware/BIOS, and debug teams.
  • Ability to develop and lead power management process improvement initiatives including technical test plan development.
  • Ability to coach and mentor junior staff.
  • Bachelor’s/Master’s degree in Computer Science or related field (preferred).
  • Strong expertise in Windows Modern Standby (S0ix) system operation (preferred).

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