Power Management Systems Engineer

Amd

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Austin, TX
Salary
$117,200–$175,800 / yr
Posted
22 days ago
Freshness
Confirmed live yesterday
Closes
Aug 20, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $178k
This role $146k
$106k most similar roles pay here $217k

This role pays less than 75% of similar roles. Most pay $148,750–$206,505 — the shaded band above. At the midpoint, this role pays about $146k versus about $178k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 367 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 367 roles with salary data.

Most-posted roles

View all roles at Amd

At a glance

TL;DR · Power Management Systems Engineer

The Power Management Systems Engineer joins the Client and Graphics Business Unit to focus on post silicon CPU/APU power management feature development solutions. This role involves driving the enablement, validation, and debug of Windows Modern Standby (S0ix) system features on mobile and desktop processors. The engineer will lead enablement strategies from pre-silicon through customer adoption while collaborating across architecture, silicon design, firmware, and validation teams. Key responsibilities include managing post silicon lab environments, resolving power management issues across BIOS and hardware, and leading process improvement initiatives for test plans and quality. The ideal candidate possesses deep expertise in S0ix system operations, SoC power management, and system architecture. Required skills include technical debugging, validation strategy, and the ability to mentor junior staff while communicating effectively across various engineering disciplines to solve complex power management problems.

What you'll do

  • Lead S0ix power management enablement and validation strategies from pre-silicon through customer adoption.
  • Drive feature enablement and validation in post-silicon lab environments for mobile and desktop processors.
  • Resolve system power management issues across silicon, firmware, BIOS, and debug teams.
  • Develop technical test plans to improve power management process quality and efficiency.
  • Coordinate with architecture, silicon design, and firmware teams to deliver production solutions.
  • Mentor and coach junior staff members on power management systems.

What we're looking for

  • Experience in post silicon CPU/APU power management feature development solutions.
  • Deep understanding of S0ix system power management across silicon hardware, platform design, and firmware/software interactions.
  • Ability to lead power management enablement, validation strategies, and debug resolution across multiple engineering teams.
  • Bachelor's or Master's degree in Computer Science or a related field (preferred).
  • Strong expertise in Windows Modern Standby (S0i3) system operation (preferred).
  • Proven track record as a technical leader in SOC power management and sustained innovation (preferred).
  • Extensive knowledge of system architecture, technical debug, and validation strategy (preferred).
  • Good written and oral communication skills to interact with various engineering disciplines and management.

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