Physical Design Engineer

What you'll do

• Execute physical design, EMIR, physical verification, and timing closure for partition and SOC levels.
• Utilize tools like Innovus, Voltus, and Primetime to perform floorplanning and place and route implementation.
• Analyze power, area, timing, and DRC metrics to optimize the overall Quality of Results (QoR).
• Develop new methodologies to improve design performance and accelerate physical design closure.
• Optimize leakage power in post-route timing tools such as Primetime.
• Diagnose timing constraint issues and provide feedback for necessary exceptions.
• Resolve DCD and MPW violations to ensure high-quality clock signals for flops and macros.
• Perform static timing and noise analysis to resolve violations not fixed by automated tools.

What we're looking for

• Master's degree or foreign equivalent in Electrical Engineering or a related field.
• 3 years of experience in the job offered or a related occupation.
• Experience using customized scripting in Tcl, Perl, or Python to accelerate physical design closure.
• Experience optimizing leakage power in post-route timing tools such as Primetime.
• Experience utilizing place and route tools including Synopsys ICC or Cadence Innovus for floorplanning and implementation.
• Ability to optimize power, timing, and area with flow adjustments to improve Quality of Results (QoR).
• Ability to diagnose timing constraint issues and provide feedback for needed exceptions.
• Expertise in resolving DCD and MPW violations and utilizing static timing/noise analysis to resolve complex violations.