Physical Design Engineer

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
—
Salary
$129,300–$225,300 / yr
Posted
14 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $203k
This role $177k
$115k most similar roles pay here $264k

This role pays less than 62% of similar roles. Most pay $168,500–$237,800 — the shaded band above. At the midpoint, this role pays about $177k versus about $203k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 2925 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2305 roles with salary data.

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At a glance

TL;DR · Physical Design Engineer

The Physical Design Engineer joins a team focused on high performance PHY design, collaborating with architecture, CAD, timing, and logic design teams. This role involves managing all phases of physical design from RTL through the delivery of final GDSII files. Key responsibilities include generating block and chip level static timing constraints, building full chip floor-plans including pin placement and power grids, and developing low power clock network guidelines. The engineer will perform place and route to meet timing, area, and power constraints while implementing ECOs for noise and EM IR violations. Required skills include proficiency in Verilog, Perl, and Tcl scripting, along with expertise in STA methodology and Physical Design Verification tools. The role addresses the technical challenge of delivering high performance PHY designs through robust physical construction and integration.

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Similar roles

Physical Design Engineer

Apple Inc

San Francisco, CA 14 days ago $150,400–$277,600
Physical Design RTL GDSII Floor-planning Place and Route STA LVS DRC Verilog Perl Tcl Synthesis Power Grid SoC Architecture Extraction
3+ yrs exp