below marketmost similar roles pay hereabove market
This role pays more than
95%
of similar roles. Most pay
$128,287–$214,000
— the blue band above.
At the midpoint, this role pays about
$255k
versus about
$171k
for comparable roles.
Based on 240 similar postings.
Employer
About Apple Inc
Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software
Apple Inc currently has
3497 open roles
on FindRole.
Listed pay typically runs
$174,149–$277,600
across 2702 roles with salary data.
The Package Integration Engineer is a senior level IC packaging engineer role focused on developing custom silicon packaging solutions for various consumer markets. You will interface between internal product design, quality, and supply chain teams while managing external suppliers to deploy new packaging technologies. Daily responsibilities include defining package characteristics, specifications, and long-term roadmaps based on performance, cost, and footprint requirements. You will perform proof of concept builds, process qualification, reliability testing, and yield analysis. Required expertise includes wafer bumping, manufacturing assembly processes like wafer back-grind, dicing, and flip chip die attach, and wafer level chip scale packaging. Proficiency in AutoCAD, APD, and multi-physics simulation is preferred. You must manage supplier R&D activities to bring products from conceptual stages to high volume manufacturing.
Define package characteristics based on module performance, cost, and footprint requirements.
Establish package specifications and long-term packaging roadmaps.
Manage supplier R&D activities including material selection, equipment selection, and process flow development.
Perform proof of concept sample builds and establish Plan of Record (POR).
Execute package and process qualifications, reliability testing, and yield analysis.
Construct Designs of Experiments to down-select materials and manufacturing processes.
Deliver packaging milestones on time to comply with product development and ramp schedules.
What we're looking for
BS degree and 10+ years of relevant industry experience.
M.S or Ph.D. degree in mechanical engineering, physics, materials science or similar disciplines with 10+ years of experience in IC packaging (preferred).
AutoCAD, APD, and multi-physics simulation knowledge (preferred).
Hands-on knowledge in Wafer Bumping and manufacturing assembly processes such as back-grind, dicing, and Flip Chip die attach (preferred).
Semiconductor Packaging Design
SiP Packaging
Cadence APD
Allegro
Signal Integrity
Power Integrity
Design for Manufacturing
NPI
Package Layout
Si Floor Plan
Process & Technology Development
reliability, testing
BOM
HVM