IC Packaging Integration Engineer

The IC Packaging Integration Engineer joins the hardware team to lead SoC package integration and architecture efforts while driving advanced packaging solutions, new material developments, and specifications. This role involves collaborating with cross-functional teams through the package definition process to deliver optimized solutions meeting electrical, mechanical, and thermal requirements. The engineer will manage test vehicle definition and execution with foundries and OSATs for technologies like FOWLP, 2.5D, 3D, and coreless MCM. Key responsibilities include performing failure analysis, root cause investigations, and utilizing DOE principles and statistical analyses to establish robust build plans. The role requires applying AI/ML and data analytics to foundry datasets for yield improvement. Required skills include expertise in signal integrity, power integrity, and the ability to review schematics and layouts using Allegro software within the semiconductor packaging domain.