Modem HW Design Engineer

Qualcomm

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$162,500–$243,700 / yr
Posted
11 days ago
Freshness
Confirmed live today
Closes
Mar 29, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $189k
This role $203k
$139k $255k
below market most similar roles pay here above market

This role pays more than 58% of similar roles. Most pay $160,000–$217,600 — the blue band above. At the midpoint, this role pays about $203k versus about $189k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 558 open roles on FindRole.

Listed pay typically runs $152,130–$222,500 across 534 roles with salary data.

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At a glance

TL;DR · Modem HW Design Engineer

The Modem HW Design Engineer joins the Modem Technologies engineering group to focus on AI-driven methodologies and next-generation modem hardware development. In this role, you will define specifications and architecture, develop RTL, and optimize for area, power, and performance. You will collaborate with verification, modeling, and physical implementation teams, as well as system, RF, firmware, and software teams to deliver first-time-right silicon. Key technical requirements include expertise in RTL coding, Verilog, SystemVerilog, C/C++, and SystemC. You will utilize synthesis, LINT, and low power design techniques within ultra-deep sub-micron CMOS technology nodes like 4nm. The work involves solving complex wireless modem problems using Generative AI, ML-assisted flows, and agentic-AI automation frameworks while adhering to 4G/5G 3GPP physical layer standards.

What you'll do

  • Define specifications and architecture/micro-architecture for next-generation modem hardware.
  • Develop RTL for wireless modem ASICs and custom datapath components for DSP applications.
  • Optimize hardware designs for area, power, and performance.
  • Implement GenAI, ML-assisted flows, and agentic-AI automation frameworks to accelerate project phases.
  • Perform synthesis, LINT, clock domain crossing, and low-power design and verification.
  • Deliver first-time-right silicon by coordinating with verification, modeling, and physical implementation teams.
  • Utilize Unix/Linux shell scripting and Python/Perl to support hardware design workflows.

What we're looking for

  • Bachelor's degree and 4+ years of relevant engineering experience, OR Master's degree and 3+ years, OR PhD and 2+ years.
  • BS or MS degree and 5+ years of relevant industry experience (preferred).
  • Strong expertise in RTL coding and logic design for wireless modem ASICs or custom datapath components for DSP applications (preferred).
  • Solid understanding of Verilog, SystemVerilog, C/C++, and SystemC (preferred).
  • Experience with synthesis, industry LINT, clock domain crossing, low power design and verification (preferred).
  • Background in wireless/wireline modem technology, DSP, or communication systems (preferred).
  • Knowledge of 4G/5G 3GPP physical layer standards (preferred).
  • Experience with Generative AI, ML, or agentic-AI-based automation (preferred).

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