IC Package Layout Team Leader

Cisco

Confirmed live yesterday High trust
Remote

Quick summary

Work type
Remote
Location
San Jose, CA
Salary
$210,600–$305,100 / yr
Posted
50 days ago
Freshness
Confirmed live yesterday
Closes
Sep 30, 2026

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $200k
This role $258k
$136k most similar roles pay here $323k

This role pays more than 89% of similar roles. Most pay $173,164–$227,300 — the shaded band above. At the midpoint, this role pays about $258k versus about $200k for comparable roles.

Based on 240 similar postings.

Employer

About Cisco

Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity

Cisco currently has 196 open roles on FindRole.

Listed pay typically runs $167,700–$245,200 across 196 roles with salary data.

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View all roles at Cisco

At a glance

TL;DR · IC Package Layout Team Leader

IC Package Layout Team Leader As an IC Package Layout Team Leader within the Common Hardware Group, you will lead and grow the San Jose layout team while overseeing complex package programs for advanced ASIC packaging projects. You will provide technical guidance, mentorship, and resource coordination to engineers while collaborating with SI/PI teams and manufacturing partners to resolve technical challenges. Your daily work involves optimizing package pinouts, stack-ups, power distribution, escape routing, and high-speed interface implementations. The role requires expertise in industry-standard EDA tools for package layout, such as Cadence APD+, along with proficiency in scripting languages like Python, Perl, or TCL. You will drive continuous improvement in methodologies and engineering efficiency while ensuring high-quality implementations that meet specific manufacturing requirements. This position focuses on solving complex hardware challenges within the domain of advanced silicon and high-speed electronics.

What you'll do

  • Lead and mentor the San Jose package layout team by providing technical guidance and day-to-day support.
  • Execute high-quality package layout for complex ASIC projects aligned with SI/PI and manufacturing requirements.
  • Coordinate resource allocation, project priorities, and staffing across multiple concurrent programs.
  • Optimize package pinouts, stack-ups, power distribution, escape routing, and high-speed interface implementations.
  • Align methodologies, tools, and engineering standards with global leadership and regional partners.
  • Manage the hiring, onboarding, and professional development of layout engineering talent.
  • Drive continuous improvements in layout methodologies, quality standards, and overall engineering efficiency.
  • Manage relationships with vendors and contractors to ensure project delivery goals are met.

What we're looking for

  • A Bachelor's degree in Electrical Engineering or a related field with 12+ years of experience is required.
  • A Master's degree in Electrical Engineering or a related field with 8+ years of experience is required.
  • A PhD in Electrical Engineering or a related field with 5+ years of experience is required.
  • Candidates must have at least 5 years of experience in package layout or advanced PCB/package implementation.
  • Experience with high-speed routing, power distribution networks (PDN), and package layout design principles is required.
  • Proficiency with industry-standard EDA tools for package layout and design is required.
  • Preferred experience includes leading or mentoring teams of engineers or technical staff.
  • Proficiency in scripting languages such as Python, Perl, or TCL is preferred.

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